cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

r8a7779-marzen.dts (4388B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the R-Car H1 (R8A77790) Marzen board
      4 *
      5 * Copyright (C) 2013 Renesas Solutions Corp.
      6 * Copyright (C) 2013 Simon Horman
      7 */
      8
      9/dts-v1/;
     10#include "r8a7779.dtsi"
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/interrupt-controller/irq.h>
     13
     14/ {
     15	model = "marzen";
     16	compatible = "renesas,marzen", "renesas,r8a7779";
     17
     18	aliases {
     19		serial0 = &scif2;
     20		serial1 = &scif4;
     21	};
     22
     23	chosen {
     24		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
     25		stdout-path = "serial0:115200n8";
     26	};
     27
     28	memory@60000000 {
     29		device_type = "memory";
     30		reg = <0x60000000 0x40000000>;
     31	};
     32
     33	fixedregulator3v3: regulator-3v3 {
     34		compatible = "regulator-fixed";
     35		regulator-name = "fixed-3.3V";
     36		regulator-min-microvolt = <3300000>;
     37		regulator-max-microvolt = <3300000>;
     38		regulator-boot-on;
     39		regulator-always-on;
     40	};
     41
     42	vccq_sdhi0: regulator-vccq-sdhi0 {
     43		compatible = "regulator-gpio";
     44
     45		regulator-name = "SDHI0 VccQ";
     46		regulator-min-microvolt = <1800000>;
     47		regulator-max-microvolt = <3300000>;
     48
     49		gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
     50		gpios-states = <1>;
     51		states = <3300000 1>, <1800000 0>;
     52	};
     53
     54	ethernet@18000000 {
     55		compatible = "smsc,lan89218", "smsc,lan9115";
     56		reg = <0x18000000 0x100>;
     57		pinctrl-0 = <&ethernet_pins>;
     58		pinctrl-names = "default";
     59
     60		phy-mode = "mii";
     61		interrupt-parent = <&irqpin0>;
     62		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
     63		smsc,irq-push-pull;
     64		reg-io-width = <4>;
     65		vddvario-supply = <&fixedregulator3v3>;
     66		vdd33a-supply = <&fixedregulator3v3>;
     67	};
     68
     69	leds {
     70		compatible = "gpio-leds";
     71		led2 {
     72			gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
     73		};
     74		led3 {
     75			gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
     76		};
     77		led4 {
     78			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
     79		};
     80	};
     81
     82	vga-encoder {
     83		compatible = "adi,adv7123";
     84
     85		ports {
     86			#address-cells = <1>;
     87			#size-cells = <0>;
     88
     89			port@0 {
     90				reg = <0>;
     91				vga_enc_in: endpoint {
     92					remote-endpoint = <&du_out_rgb0>;
     93				};
     94			};
     95			port@1 {
     96				reg = <1>;
     97				vga_enc_out: endpoint {
     98					remote-endpoint = <&vga_in>;
     99				};
    100			};
    101		};
    102	};
    103
    104	vga {
    105		compatible = "vga-connector";
    106
    107		port {
    108			vga_in: endpoint {
    109				remote-endpoint = <&vga_enc_out>;
    110			};
    111		};
    112	};
    113
    114	lvds-encoder {
    115		compatible = "thine,thc63lvdm83d";
    116
    117		ports {
    118			#address-cells = <1>;
    119			#size-cells = <0>;
    120
    121			port@0 {
    122				reg = <0>;
    123				lvds_enc_in: endpoint {
    124					remote-endpoint = <&du_out_rgb1>;
    125				};
    126			};
    127			port@1 {
    128				reg = <1>;
    129				lvds_connector: endpoint {
    130				};
    131			};
    132		};
    133	};
    134
    135	x3_clk: x3-clock {
    136		compatible = "fixed-clock";
    137		#clock-cells = <0>;
    138		clock-frequency = <65000000>;
    139	};
    140};
    141
    142&du {
    143	pinctrl-0 = <&du_pins>;
    144	pinctrl-names = "default";
    145	status = "okay";
    146
    147	clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
    148	clock-names = "du.0", "dclkin.0";
    149
    150	ports {
    151		port@0 {
    152			endpoint {
    153				remote-endpoint = <&vga_enc_in>;
    154			};
    155		};
    156		port@1 {
    157			endpoint {
    158				remote-endpoint = <&lvds_enc_in>;
    159			};
    160		};
    161	};
    162};
    163
    164&irqpin0 {
    165	status = "okay";
    166};
    167
    168&extal_clk {
    169	clock-frequency = <31250000>;
    170};
    171
    172&tmu0 {
    173	status = "okay";
    174};
    175
    176&pfc {
    177	pinctrl-0 = <&scif_clk_pins>;
    178	pinctrl-names = "default";
    179
    180	du_pins: du {
    181		du0 {
    182			groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", "du0_clk_in";
    183			function = "du0";
    184		};
    185		du1 {
    186			groups = "du1_rgb666", "du1_sync_1", "du1_clk_out";
    187			function = "du1";
    188		};
    189	};
    190
    191	scif_clk_pins: scif_clk {
    192		groups = "scif_clk_b";
    193		function = "scif_clk";
    194	};
    195
    196	ethernet_pins: ethernet {
    197		intc {
    198			groups = "intc_irq1_b";
    199			function = "intc";
    200		};
    201		lbsc {
    202			groups = "lbsc_ex_cs0";
    203			function = "lbsc";
    204		};
    205	};
    206
    207	scif2_pins: scif2 {
    208		groups = "scif2_data_c";
    209		function = "scif2";
    210	};
    211
    212	scif4_pins: scif4 {
    213		groups = "scif4_data";
    214		function = "scif4";
    215	};
    216
    217	sdhi0_pins: sd0 {
    218		groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
    219		function = "sdhi0";
    220	};
    221
    222	hspi0_pins: hspi0 {
    223		groups = "hspi0";
    224		function = "hspi0";
    225	};
    226};
    227
    228&sata {
    229	status = "okay";
    230};
    231
    232&scif2 {
    233	pinctrl-0 = <&scif2_pins>;
    234	pinctrl-names = "default";
    235
    236	status = "okay";
    237};
    238
    239&scif4 {
    240	pinctrl-0 = <&scif4_pins>;
    241	pinctrl-names = "default";
    242
    243	status = "okay";
    244};
    245
    246&scif_clk {
    247	clock-frequency = <14745600>;
    248};
    249
    250&sdhi0 {
    251	pinctrl-0 = <&sdhi0_pins>;
    252	pinctrl-names = "default";
    253
    254	vmmc-supply = <&fixedregulator3v3>;
    255	vqmmc-supply = <&vccq_sdhi0>;
    256	bus-width = <4>;
    257	status = "okay";
    258};
    259
    260&hspi0 {
    261	pinctrl-0 = <&hspi0_pins>;
    262	pinctrl-names = "default";
    263	status = "okay";
    264};