cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r8a7791-porter.dts (8918B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the Porter board
      4 *
      5 * Copyright (C) 2015 Cogent Embedded, Inc.
      6 */
      7
      8/*
      9 * SSI-AK4642
     10 *
     11 * JP3: 2-1: AK4642
     12 *      2-3: ADV7511
     13 *
     14 * This command is required before playback/capture:
     15 *
     16 *	amixer set "LINEOUT Mixer DACL" on
     17 */
     18
     19/dts-v1/;
     20#include "r8a7791.dtsi"
     21#include <dt-bindings/gpio/gpio.h>
     22
     23/ {
     24	model = "Porter";
     25	compatible = "renesas,porter", "renesas,r8a7791";
     26
     27	aliases {
     28		serial0 = &scif0;
     29		i2c9 = &gpioi2c2;
     30		i2c10 = &i2chdmi;
     31		mmc0 = &sdhi0;
     32		mmc1 = &sdhi2;
     33	};
     34
     35	chosen {
     36		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
     37		stdout-path = "serial0:115200n8";
     38	};
     39
     40	memory@40000000 {
     41		device_type = "memory";
     42		reg = <0 0x40000000 0 0x40000000>;
     43	};
     44
     45	memory@200000000 {
     46		device_type = "memory";
     47		reg = <2 0x00000000 0 0x40000000>;
     48	};
     49
     50	vcc_sdhi0: regulator-vcc-sdhi0 {
     51		compatible = "regulator-fixed";
     52
     53		regulator-name = "SDHI0 Vcc";
     54		regulator-min-microvolt = <3300000>;
     55		regulator-max-microvolt = <3300000>;
     56		regulator-always-on;
     57	};
     58
     59	vccq_sdhi0: regulator-vccq-sdhi0 {
     60		compatible = "regulator-gpio";
     61
     62		regulator-name = "SDHI0 VccQ";
     63		regulator-min-microvolt = <1800000>;
     64		regulator-max-microvolt = <3300000>;
     65
     66		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
     67		gpios-states = <1>;
     68		states = <3300000 1>, <1800000 0>;
     69	};
     70
     71	vcc_sdhi2: regulator-vcc-sdhi2 {
     72		compatible = "regulator-fixed";
     73
     74		regulator-name = "SDHI2 Vcc";
     75		regulator-min-microvolt = <3300000>;
     76		regulator-max-microvolt = <3300000>;
     77		regulator-always-on;
     78	};
     79
     80	vccq_sdhi2: regulator-vccq-sdhi2 {
     81		compatible = "regulator-gpio";
     82
     83		regulator-name = "SDHI2 VccQ";
     84		regulator-min-microvolt = <1800000>;
     85		regulator-max-microvolt = <3300000>;
     86
     87		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
     88		gpios-states = <1>;
     89		states = <3300000 1>, <1800000 0>;
     90	};
     91
     92	hdmi-out {
     93		compatible = "hdmi-connector";
     94		type = "a";
     95
     96		port {
     97			hdmi_con: endpoint {
     98				remote-endpoint = <&adv7511_out>;
     99			};
    100		};
    101	};
    102
    103	x3_clk: x3-clock {
    104		compatible = "fixed-clock";
    105		#clock-cells = <0>;
    106		clock-frequency = <148500000>;
    107	};
    108
    109	x16_clk: x16-clock {
    110		compatible = "fixed-clock";
    111		#clock-cells = <0>;
    112		clock-frequency = <74250000>;
    113	};
    114
    115	x14_clk: audio_clock {
    116		compatible = "fixed-clock";
    117		#clock-cells = <0>;
    118		clock-frequency = <11289600>;
    119	};
    120
    121	sound {
    122		compatible = "simple-audio-card";
    123
    124		simple-audio-card,format = "left_j";
    125		simple-audio-card,bitclock-master = <&soundcodec>;
    126		simple-audio-card,frame-master = <&soundcodec>;
    127
    128		simple-audio-card,cpu {
    129			sound-dai = <&rcar_sound>;
    130		};
    131
    132		soundcodec: simple-audio-card,codec {
    133			sound-dai = <&ak4642>;
    134			clocks = <&x14_clk>;
    135		};
    136	};
    137
    138	gpioi2c2: i2c-9 {
    139		#address-cells = <1>;
    140		#size-cells = <0>;
    141		compatible = "i2c-gpio";
    142		status = "disabled";
    143		scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    144		sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    145		i2c-gpio,delay-us = <5>;
    146	};
    147
    148	/*
    149	 * A fallback to GPIO is provided for I2C2.
    150	 */
    151	i2chdmi: i2c-10 {
    152		compatible = "i2c-demux-pinctrl";
    153		i2c-parent = <&i2c2>, <&gpioi2c2>;
    154		i2c-bus-name = "i2c-hdmi";
    155		#address-cells = <1>;
    156		#size-cells = <0>;
    157
    158		ak4642: codec@12 {
    159			compatible = "asahi-kasei,ak4642";
    160			#sound-dai-cells = <0>;
    161			reg = <0x12>;
    162		};
    163
    164		composite-in@20 {
    165			compatible = "adi,adv7180";
    166			reg = <0x20>;
    167
    168			port {
    169				adv7180: endpoint {
    170					bus-width = <8>;
    171					remote-endpoint = <&vin0ep>;
    172				};
    173			};
    174		};
    175
    176		hdmi@39 {
    177			compatible = "adi,adv7511w";
    178			reg = <0x39>;
    179			interrupt-parent = <&gpio3>;
    180			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
    181
    182			adi,input-depth = <8>;
    183			adi,input-colorspace = "rgb";
    184			adi,input-clock = "1x";
    185
    186			ports {
    187				#address-cells = <1>;
    188				#size-cells = <0>;
    189
    190				port@0 {
    191					reg = <0>;
    192					adv7511_in: endpoint {
    193						remote-endpoint = <&du_out_rgb>;
    194					};
    195				};
    196
    197				port@1 {
    198					reg = <1>;
    199					adv7511_out: endpoint {
    200						remote-endpoint = <&hdmi_con>;
    201					};
    202				};
    203			};
    204		};
    205	};
    206};
    207
    208&extal_clk {
    209	clock-frequency = <20000000>;
    210};
    211
    212&pfc {
    213	scif0_pins: scif0 {
    214		groups = "scif0_data_d";
    215		function = "scif0";
    216	};
    217
    218	ether_pins: ether {
    219		groups = "eth_link", "eth_mdio", "eth_rmii";
    220		function = "eth";
    221	};
    222
    223	phy1_pins: phy1 {
    224		groups = "intc_irq0";
    225		function = "intc";
    226	};
    227
    228	pmic_irq_pins: pmicirq {
    229		groups = "intc_irq2";
    230		function = "intc";
    231	};
    232
    233	sdhi0_pins: sd0 {
    234		groups = "sdhi0_data4", "sdhi0_ctrl";
    235		function = "sdhi0";
    236	};
    237
    238	sdhi2_pins: sd2 {
    239		groups = "sdhi2_data4", "sdhi2_ctrl";
    240		function = "sdhi2";
    241	};
    242
    243	qspi_pins: qspi {
    244		groups = "qspi_ctrl", "qspi_data4";
    245		function = "qspi";
    246	};
    247
    248	i2c2_pins: i2c2 {
    249		groups = "i2c2";
    250		function = "i2c2";
    251	};
    252
    253	usb0_pins: usb0 {
    254		groups = "usb0";
    255		function = "usb0";
    256	};
    257
    258	usb1_pins: usb1 {
    259		groups = "usb1";
    260		function = "usb1";
    261	};
    262
    263	vin0_pins: vin0 {
    264		groups = "vin0_data8", "vin0_clk";
    265		function = "vin0";
    266	};
    267
    268	can0_pins: can0 {
    269		groups = "can0_data";
    270		function = "can0";
    271	};
    272
    273	du_pins: du {
    274		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
    275		function = "du";
    276	};
    277
    278	ssi_pins: sound {
    279		groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
    280		function = "ssi";
    281	};
    282
    283	audio_clk_pins: audio_clk {
    284		groups = "audio_clk_a";
    285		function = "audio_clk";
    286	};
    287};
    288
    289&scif0 {
    290	pinctrl-0 = <&scif0_pins>;
    291	pinctrl-names = "default";
    292
    293	status = "okay";
    294};
    295
    296&ether {
    297	pinctrl-0 = <&ether_pins>, <&phy1_pins>;
    298	pinctrl-names = "default";
    299
    300	phy-handle = <&phy1>;
    301	renesas,ether-link-active-low;
    302	status = "okay";
    303
    304	phy1: ethernet-phy@1 {
    305		compatible = "ethernet-phy-id0022.1537",
    306			     "ethernet-phy-ieee802.3-c22";
    307		reg = <1>;
    308		interrupt-parent = <&irqc0>;
    309		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    310		micrel,led-mode = <1>;
    311		reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
    312	};
    313};
    314
    315&sdhi0 {
    316	pinctrl-0 = <&sdhi0_pins>;
    317	pinctrl-names = "default";
    318
    319	vmmc-supply = <&vcc_sdhi0>;
    320	vqmmc-supply = <&vccq_sdhi0>;
    321	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
    322	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
    323	status = "okay";
    324};
    325
    326&sdhi2 {
    327	pinctrl-0 = <&sdhi2_pins>;
    328	pinctrl-names = "default";
    329
    330	vmmc-supply = <&vcc_sdhi2>;
    331	vqmmc-supply = <&vccq_sdhi2>;
    332	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
    333	status = "okay";
    334};
    335
    336&qspi {
    337	pinctrl-0 = <&qspi_pins>;
    338	pinctrl-names = "default";
    339
    340	status = "okay";
    341
    342	flash@0 {
    343		compatible = "spansion,s25fl512s", "jedec,spi-nor";
    344		reg = <0>;
    345		spi-max-frequency = <30000000>;
    346		spi-tx-bus-width = <4>;
    347		spi-rx-bus-width = <4>;
    348		m25p,fast-read;
    349
    350		partitions {
    351			compatible = "fixed-partitions";
    352			#address-cells = <1>;
    353			#size-cells = <1>;
    354
    355			partition@0 {
    356				label = "loader_prg";
    357				reg = <0x00000000 0x00040000>;
    358				read-only;
    359			};
    360			partition@40000 {
    361				label = "user_prg";
    362				reg = <0x00040000 0x00400000>;
    363				read-only;
    364			};
    365			partition@440000 {
    366				label = "flash_fs";
    367				reg = <0x00440000 0x03bc0000>;
    368			};
    369		};
    370	};
    371};
    372
    373&i2c2 {
    374	pinctrl-0 = <&i2c2_pins>;
    375	pinctrl-names = "i2c-hdmi";
    376
    377	clock-frequency = <400000>;
    378};
    379
    380&i2c6 {
    381	pinctrl-names = "default";
    382	pinctrl-0 = <&pmic_irq_pins>;
    383	status = "okay";
    384	clock-frequency = <100000>;
    385
    386	pmic@5a {
    387		compatible = "dlg,da9063l";
    388		reg = <0x5a>;
    389		interrupt-parent = <&irqc0>;
    390		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
    391		interrupt-controller;
    392
    393		wdt {
    394			compatible = "dlg,da9063-watchdog";
    395		};
    396	};
    397
    398	vdd_dvfs: regulator@68 {
    399		compatible = "dlg,da9210";
    400		reg = <0x68>;
    401		interrupt-parent = <&irqc0>;
    402		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
    403
    404		regulator-min-microvolt = <1000000>;
    405		regulator-max-microvolt = <1000000>;
    406		regulator-boot-on;
    407		regulator-always-on;
    408	};
    409};
    410
    411&sata0 {
    412	status = "okay";
    413};
    414
    415&cpu0 {
    416	cpu0-supply = <&vdd_dvfs>;
    417};
    418
    419/* composite video input */
    420&vin0 {
    421	status = "okay";
    422	pinctrl-0 = <&vin0_pins>;
    423	pinctrl-names = "default";
    424
    425	port {
    426		vin0ep: endpoint {
    427			remote-endpoint = <&adv7180>;
    428			bus-width = <8>;
    429		};
    430	};
    431};
    432
    433&pci0 {
    434	pinctrl-0 = <&usb0_pins>;
    435	pinctrl-names = "default";
    436
    437	status = "okay";
    438};
    439
    440&pci1 {
    441	pinctrl-0 = <&usb1_pins>;
    442	pinctrl-names = "default";
    443
    444	status = "okay";
    445};
    446
    447&hsusb {
    448	pinctrl-0 = <&usb0_pins>;
    449	pinctrl-names = "default";
    450
    451	status = "okay";
    452};
    453
    454&usbphy {
    455	status = "okay";
    456};
    457
    458&pcie_bus_clk {
    459	clock-frequency = <100000000>;
    460};
    461
    462&pciec {
    463	status = "okay";
    464};
    465
    466&can0 {
    467	pinctrl-0 = <&can0_pins>;
    468	pinctrl-names = "default";
    469
    470	status = "okay";
    471};
    472
    473&du {
    474	pinctrl-0 = <&du_pins>;
    475	pinctrl-names = "default";
    476	status = "okay";
    477
    478	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
    479		 <&x3_clk>, <&x16_clk>;
    480	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
    481
    482	ports {
    483		port@0 {
    484			endpoint {
    485				remote-endpoint = <&adv7511_in>;
    486			};
    487		};
    488	};
    489};
    490
    491&lvds0 {
    492	ports {
    493		port@1 {
    494			lvds_connector: endpoint {
    495			};
    496		};
    497	};
    498};
    499
    500&rcar_sound {
    501	pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
    502	pinctrl-names = "default";
    503	status = "okay";
    504
    505	/* Single DAI */
    506	#sound-dai-cells = <0>;
    507
    508	rcar_sound,dai {
    509		dai0 {
    510			playback = <&ssi0>;
    511			capture  = <&ssi1>;
    512		};
    513	};
    514};
    515
    516&rwdt {
    517	timeout-sec = <60>;
    518	status = "okay";
    519};
    520
    521&ssi1 {
    522	shared-pin;
    523};