cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r8a7794-alt.dts (9551B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Device Tree Source for the Alt board
      4 *
      5 * Copyright (C) 2014 Renesas Electronics Corporation
      6 */
      7
      8/dts-v1/;
      9#include "r8a7794.dtsi"
     10#include <dt-bindings/gpio/gpio.h>
     11#include <dt-bindings/input/input.h>
     12
     13/ {
     14	model = "Alt";
     15	compatible = "renesas,alt", "renesas,r8a7794";
     16
     17	aliases {
     18		serial0 = &scif2;
     19		i2c9 = &gpioi2c1;
     20		i2c10 = &gpioi2c4;
     21		i2c11 = &i2chdmi;
     22		i2c12 = &i2cexio4;
     23		mmc0 = &mmcif0;
     24		mmc1 = &sdhi0;
     25		mmc2 = &sdhi1;
     26	};
     27
     28	chosen {
     29		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
     30		stdout-path = "serial0:115200n8";
     31	};
     32
     33	memory@40000000 {
     34		device_type = "memory";
     35		reg = <0 0x40000000 0 0x40000000>;
     36	};
     37
     38	d3_3v: regulator-d3-3v {
     39		compatible = "regulator-fixed";
     40		regulator-name = "D3.3V";
     41		regulator-min-microvolt = <3300000>;
     42		regulator-max-microvolt = <3300000>;
     43		regulator-boot-on;
     44		regulator-always-on;
     45	};
     46
     47	vcc_sdhi0: regulator-vcc-sdhi0 {
     48		compatible = "regulator-fixed";
     49
     50		regulator-name = "SDHI0 Vcc";
     51		regulator-min-microvolt = <3300000>;
     52		regulator-max-microvolt = <3300000>;
     53
     54		gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
     55		enable-active-high;
     56	};
     57
     58	vccq_sdhi0: regulator-vccq-sdhi0 {
     59		compatible = "regulator-gpio";
     60
     61		regulator-name = "SDHI0 VccQ";
     62		regulator-min-microvolt = <1800000>;
     63		regulator-max-microvolt = <3300000>;
     64
     65		gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
     66		gpios-states = <1>;
     67		states = <3300000 1>, <1800000 0>;
     68	};
     69
     70	vcc_sdhi1: regulator-vcc-sdhi1 {
     71		compatible = "regulator-fixed";
     72
     73		regulator-name = "SDHI1 Vcc";
     74		regulator-min-microvolt = <3300000>;
     75		regulator-max-microvolt = <3300000>;
     76
     77		gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
     78		enable-active-high;
     79	};
     80
     81	vccq_sdhi1: regulator-vccq-sdhi1 {
     82		compatible = "regulator-gpio";
     83
     84		regulator-name = "SDHI1 VccQ";
     85		regulator-min-microvolt = <1800000>;
     86		regulator-max-microvolt = <3300000>;
     87
     88		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
     89		gpios-states = <1>;
     90		states = <3300000 1>, <1800000 0>;
     91	};
     92
     93	lbsc {
     94		#address-cells = <1>;
     95		#size-cells = <1>;
     96	};
     97
     98	keyboard {
     99		compatible = "gpio-keys";
    100
    101		pinctrl-0 = <&keyboard_pins>;
    102		pinctrl-names = "default";
    103
    104		one {
    105			linux,code = <KEY_1>;
    106			label = "SW2-1";
    107			wakeup-source;
    108			debounce-interval = <20>;
    109			gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
    110		};
    111		two {
    112			linux,code = <KEY_2>;
    113			label = "SW2-2";
    114			wakeup-source;
    115			debounce-interval = <20>;
    116			gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
    117		};
    118		three {
    119			linux,code = <KEY_3>;
    120			label = "SW2-3";
    121			wakeup-source;
    122			debounce-interval = <20>;
    123			gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
    124		};
    125		four {
    126			linux,code = <KEY_4>;
    127			label = "SW2-4";
    128			wakeup-source;
    129			debounce-interval = <20>;
    130			gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
    131		};
    132	};
    133
    134	vga-encoder {
    135		compatible = "adi,adv7123";
    136
    137		ports {
    138			#address-cells = <1>;
    139			#size-cells = <0>;
    140
    141			port@0 {
    142				reg = <0>;
    143				adv7123_in: endpoint {
    144					remote-endpoint = <&du_out_rgb1>;
    145				};
    146			};
    147			port@1 {
    148				reg = <1>;
    149				adv7123_out: endpoint {
    150					remote-endpoint = <&vga_in>;
    151				};
    152			};
    153		};
    154	};
    155
    156	vga {
    157		compatible = "vga-connector";
    158
    159		port {
    160			vga_in: endpoint {
    161				remote-endpoint = <&adv7123_out>;
    162			};
    163		};
    164	};
    165
    166	x2_clk: x2-clock {
    167		compatible = "fixed-clock";
    168		#clock-cells = <0>;
    169		clock-frequency = <74250000>;
    170	};
    171
    172	x13_clk: x13-clock {
    173		compatible = "fixed-clock";
    174		#clock-cells = <0>;
    175		clock-frequency = <148500000>;
    176	};
    177
    178	gpioi2c1: i2c-9 {
    179		#address-cells = <1>;
    180		#size-cells = <0>;
    181		compatible = "i2c-gpio";
    182		status = "disabled";
    183		scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    184		sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    185	};
    186
    187	gpioi2c4: i2c-10 {
    188		#address-cells = <1>;
    189		#size-cells = <0>;
    190		compatible = "i2c-gpio";
    191		status = "disabled";
    192		scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    193		sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
    194		i2c-gpio,delay-us = <5>;
    195	};
    196
    197	/*
    198	 * A fallback to GPIO is provided for I2C1.
    199	 */
    200	i2chdmi: i2c-11 {
    201		compatible = "i2c-demux-pinctrl";
    202		i2c-parent = <&i2c1>, <&gpioi2c1>;
    203		i2c-bus-name = "i2c-hdmi";
    204		#address-cells = <1>;
    205		#size-cells = <0>;
    206
    207		composite-in@20 {
    208			compatible = "adi,adv7180";
    209			reg = <0x20>;
    210
    211			port {
    212				adv7180: endpoint {
    213					bus-width = <8>;
    214					remote-endpoint = <&vin0ep>;
    215				};
    216			};
    217		};
    218
    219		eeprom@50 {
    220			compatible = "renesas,r1ex24002", "atmel,24c02";
    221			reg = <0x50>;
    222			pagesize = <16>;
    223		};
    224	};
    225
    226	/*
    227	 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
    228	 * A fallback to GPIO is provided.
    229	 */
    230	i2cexio4: i2c-14 {
    231		compatible = "i2c-demux-pinctrl";
    232		i2c-parent = <&i2c4>, <&gpioi2c4>;
    233		i2c-bus-name = "i2c-exio4";
    234		#address-cells = <1>;
    235		#size-cells = <0>;
    236	};
    237};
    238
    239&pci0 {
    240	status = "okay";
    241	pinctrl-0 = <&usb0_pins>;
    242	pinctrl-names = "default";
    243};
    244
    245&pci1 {
    246	status = "okay";
    247	pinctrl-0 = <&usb1_pins>;
    248	pinctrl-names = "default";
    249};
    250
    251&usbphy {
    252	status = "okay";
    253};
    254
    255&du {
    256	pinctrl-0 = <&du_pins>;
    257	pinctrl-names = "default";
    258	status = "okay";
    259
    260	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
    261		 <&x13_clk>, <&x2_clk>;
    262	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
    263
    264	ports {
    265		port@1 {
    266			endpoint {
    267				remote-endpoint = <&adv7123_in>;
    268			};
    269		};
    270	};
    271};
    272
    273&extal_clk {
    274	clock-frequency = <20000000>;
    275};
    276
    277&pfc {
    278	pinctrl-0 = <&scif_clk_pins>;
    279	pinctrl-names = "default";
    280
    281	du_pins: du {
    282		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
    283		function = "du1";
    284	};
    285
    286	scif2_pins: scif2 {
    287		groups = "scif2_data";
    288		function = "scif2";
    289	};
    290
    291	scif_clk_pins: scif_clk {
    292		groups = "scif_clk";
    293		function = "scif_clk";
    294	};
    295
    296	ether_pins: ether {
    297		groups = "eth_link", "eth_mdio", "eth_rmii";
    298		function = "eth";
    299	};
    300
    301	phy1_pins: phy1 {
    302		groups = "intc_irq8";
    303		function = "intc";
    304	};
    305
    306	i2c1_pins: i2c1 {
    307		groups = "i2c1";
    308		function = "i2c1";
    309	};
    310
    311	i2c4_pins: i2c4 {
    312		groups = "i2c4";
    313		function = "i2c4";
    314	};
    315
    316	vin0_pins: vin0 {
    317		groups = "vin0_data8", "vin0_clk";
    318		function = "vin0";
    319	};
    320
    321	mmcif0_pins: mmcif0 {
    322		groups = "mmc_data8", "mmc_ctrl";
    323		function = "mmc";
    324	};
    325
    326	sdhi0_pins: sd0 {
    327		groups = "sdhi0_data4", "sdhi0_ctrl";
    328		function = "sdhi0";
    329		power-source = <3300>;
    330	};
    331
    332	sdhi0_pins_uhs: sd0_uhs {
    333		groups = "sdhi0_data4", "sdhi0_ctrl";
    334		function = "sdhi0";
    335		power-source = <1800>;
    336	};
    337
    338	sdhi1_pins: sd1 {
    339		groups = "sdhi1_data4", "sdhi1_ctrl";
    340		function = "sdhi1";
    341		power-source = <3300>;
    342	};
    343
    344	sdhi1_pins_uhs: sd1_uhs {
    345		groups = "sdhi1_data4", "sdhi1_ctrl";
    346		function = "sdhi1";
    347		power-source = <1800>;
    348	};
    349
    350	usb0_pins: usb0 {
    351		groups = "usb0";
    352		function = "usb0";
    353	};
    354
    355	usb1_pins: usb1 {
    356		groups = "usb1";
    357		function = "usb1";
    358	};
    359
    360	keyboard_pins: keyboard {
    361		pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12";
    362		bias-pull-up;
    363	};
    364};
    365
    366&cmt0 {
    367	status = "okay";
    368};
    369
    370&pfc {
    371	qspi_pins: qspi {
    372		groups = "qspi_ctrl", "qspi_data4";
    373		function = "qspi";
    374	};
    375};
    376
    377&ether {
    378	pinctrl-0 = <&ether_pins>, <&phy1_pins>;
    379	pinctrl-names = "default";
    380
    381	phy-handle = <&phy1>;
    382	renesas,ether-link-active-low;
    383	status = "okay";
    384
    385	phy1: ethernet-phy@1 {
    386		compatible = "ethernet-phy-id0022.1537",
    387			     "ethernet-phy-ieee802.3-c22";
    388		reg = <1>;
    389		interrupt-parent = <&irqc0>;
    390		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
    391		micrel,led-mode = <1>;
    392		reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
    393	};
    394};
    395
    396&mmcif0 {
    397	pinctrl-0 = <&mmcif0_pins>;
    398	pinctrl-names = "default";
    399
    400	vmmc-supply = <&d3_3v>;
    401	vqmmc-supply = <&d3_3v>;
    402	bus-width = <8>;
    403	non-removable;
    404	status = "okay";
    405};
    406
    407&rwdt {
    408	timeout-sec = <60>;
    409	status = "okay";
    410};
    411
    412&sdhi0 {
    413	pinctrl-0 = <&sdhi0_pins>;
    414	pinctrl-1 = <&sdhi0_pins_uhs>;
    415	pinctrl-names = "default", "state_uhs";
    416
    417	vmmc-supply = <&vcc_sdhi0>;
    418	vqmmc-supply = <&vccq_sdhi0>;
    419	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
    420	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
    421	sd-uhs-sdr50;
    422	sd-uhs-sdr104;
    423	status = "okay";
    424};
    425
    426&sdhi1 {
    427	pinctrl-0 = <&sdhi1_pins>;
    428	pinctrl-1 = <&sdhi1_pins_uhs>;
    429	pinctrl-names = "default", "state_uhs";
    430
    431	vmmc-supply = <&vcc_sdhi1>;
    432	vqmmc-supply = <&vccq_sdhi1>;
    433	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
    434	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
    435	sd-uhs-sdr50;
    436	status = "okay";
    437};
    438
    439&i2c1 {
    440	pinctrl-0 = <&i2c1_pins>;
    441	pinctrl-names = "i2c-hdmi";
    442
    443	clock-frequency = <400000>;
    444};
    445
    446&i2c4 {
    447	pinctrl-0 = <&i2c4_pins>;
    448	pinctrl-names = "i2c-exio4";
    449};
    450
    451&i2c7 {
    452	status = "okay";
    453	clock-frequency = <100000>;
    454
    455	pmic@58 {
    456		compatible = "dlg,da9063";
    457		reg = <0x58>;
    458		interrupt-parent = <&gpio3>;
    459		interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
    460		interrupt-controller;
    461
    462		rtc {
    463			compatible = "dlg,da9063-rtc";
    464		};
    465
    466		wdt {
    467			compatible = "dlg,da9063-watchdog";
    468		};
    469	};
    470};
    471
    472&vin0 {
    473	status = "okay";
    474	pinctrl-0 = <&vin0_pins>;
    475	pinctrl-names = "default";
    476
    477	port {
    478		vin0ep: endpoint {
    479			remote-endpoint = <&adv7180>;
    480			bus-width = <8>;
    481		};
    482	};
    483};
    484
    485&scif2 {
    486	pinctrl-0 = <&scif2_pins>;
    487	pinctrl-names = "default";
    488
    489	status = "okay";
    490};
    491
    492&scif_clk {
    493	clock-frequency = <14745600>;
    494};
    495
    496&qspi {
    497	pinctrl-0 = <&qspi_pins>;
    498	pinctrl-names = "default";
    499
    500	status = "okay";
    501
    502	flash@0 {
    503		compatible = "spansion,s25fl512s", "jedec,spi-nor";
    504		reg = <0>;
    505		spi-max-frequency = <30000000>;
    506		spi-tx-bus-width = <4>;
    507		spi-rx-bus-width = <4>;
    508		spi-cpol;
    509		spi-cpha;
    510		m25p,fast-read;
    511
    512		partitions {
    513			compatible = "fixed-partitions";
    514			#address-cells = <1>;
    515			#size-cells = <1>;
    516
    517			partition@0 {
    518				label = "loader";
    519				reg = <0x00000000 0x00040000>;
    520				read-only;
    521			};
    522			partition@40000 {
    523				label = "system";
    524				reg = <0x00040000 0x00040000>;
    525				read-only;
    526			};
    527			partition@80000 {
    528				label = "user";
    529				reg = <0x00080000 0x03f80000>;
    530			};
    531		};
    532	};
    533};