cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rk3288-veyron-brain.dts (2392B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google Veyron Brain Rev 0 board device tree source
      4 *
      5 * Copyright 2014 Google, Inc
      6 */
      7
      8/dts-v1/;
      9#include "rk3288-veyron.dtsi"
     10#include "rk3288-veyron-broadcom-bluetooth.dtsi"
     11
     12/ {
     13	model = "Google Brain";
     14	compatible = "google,veyron-brain-rev0", "google,veyron-brain",
     15		     "google,veyron", "rockchip,rk3288";
     16
     17	vcc33_sys: vcc33-sys {
     18		vin-supply = <&vcc_5v>;
     19	};
     20
     21	vcc33_io: vcc33_io {
     22		compatible = "regulator-fixed";
     23		regulator-name = "vcc33_io";
     24		regulator-always-on;
     25		regulator-boot-on;
     26		vin-supply = <&vcc33_sys>;
     27		/* This is gated by vcc_18 too */
     28	};
     29
     30	/* This turns on vbus for host2 and otg (dwc2) */
     31	vcc5_host2: vcc5-host2-regulator {
     32		compatible = "regulator-fixed";
     33		enable-active-high;
     34		gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
     35		pinctrl-names = "default";
     36		pinctrl-0 = <&usb2_pwr_en>;
     37		regulator-name = "vcc5_host2";
     38		regulator-always-on;
     39		regulator-boot-on;
     40	};
     41};
     42
     43&pinctrl {
     44	pinctrl-names = "default";
     45	pinctrl-0 = <
     46		/* Common for sleep and wake, but no owners */
     47		&ddr0_retention
     48		&ddrio_pwroff
     49		&global_pwroff
     50	>;
     51
     52	hdmi {
     53		vcc50_hdmi_en: vcc50-hdmi-en {
     54			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
     55		};
     56	};
     57
     58	pmic {
     59		dvs_1: dvs-1 {
     60			rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
     61		};
     62
     63		dvs_2: dvs-2 {
     64			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
     65		};
     66	};
     67
     68	usb-host {
     69		usb2_pwr_en: usb2-pwr-en {
     70			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
     71		};
     72	};
     73};
     74
     75&rk808 {
     76	pinctrl-names = "default";
     77	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
     78	dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>,
     79		    <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
     80
     81	/delete-property/ vcc6-supply;
     82
     83	regulators {
     84		/* vcc33_io is sourced directly from vcc33_sys */
     85		/delete-node/ LDO_REG1;
     86
     87		/* This is not a pwren anymore, but the real power supply */
     88		vdd10_lcd: LDO_REG7 {
     89			regulator-always-on;
     90			regulator-boot-on;
     91			regulator-min-microvolt = <1000000>;
     92			regulator-max-microvolt = <1000000>;
     93			regulator-name = "vdd10_lcd";
     94			regulator-suspend-mem-disabled;
     95		};
     96
     97		vcc18_hdmi: SWITCH_REG2 {
     98			regulator-always-on;
     99			regulator-boot-on;
    100			regulator-name = "vcc18_hdmi";
    101			regulator-suspend-mem-disabled;
    102		};
    103	};
    104};
    105
    106&vcc50_hdmi {
    107	enable-active-high;
    108	gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
    109	pinctrl-names = "default";
    110	pinctrl-0 = <&vcc50_hdmi_en>;
    111};