cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

rk3288-veyron-chromebook.dtsi (3877B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google Veyron (and derivatives) board device tree source
      4 * Chromebook specific parts
      5 *
      6 * Copyright 2015 Google, Inc
      7 */
      8
      9#include <dt-bindings/clock/rockchip,rk808.h>
     10#include <dt-bindings/input/input.h>
     11#include "rk3288-veyron.dtsi"
     12#include "rk3288-veyron-analog-audio.dtsi"
     13#include "rk3288-veyron-edp.dtsi"
     14#include "rk3288-veyron-sdmmc.dtsi"
     15
     16/ {
     17	aliases {
     18		/* Assign 20 so we don't get confused w/ builtin ones */
     19		i2c20 = &i2c_tunnel;
     20	};
     21
     22	gpio-charger {
     23		compatible = "gpio-charger";
     24		charger-type = "mains";
     25		gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
     26		pinctrl-names = "default";
     27		pinctrl-0 = <&ac_present_ap>;
     28	};
     29
     30	lid_switch: lid-switch {
     31		compatible = "gpio-keys";
     32		pinctrl-names = "default";
     33		pinctrl-0 = <&ap_lid_int_l>;
     34
     35		lid {
     36			label = "Lid";
     37			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
     38			wakeup-source;
     39			linux,code = <SW_LID>;
     40			linux,input-type = <EV_SW>;
     41			debounce-interval = <1>;
     42		};
     43	};
     44
     45	/* A non-regulated voltage from power supply or battery */
     46	vccsys: vccsys {
     47		compatible = "regulator-fixed";
     48		regulator-name = "vccsys";
     49		regulator-boot-on;
     50		regulator-always-on;
     51	};
     52
     53	vcc33_sys: vcc33-sys {
     54		vin-supply = <&vccsys>;
     55	};
     56
     57	vcc_5v: vcc-5v {
     58		vin-supply = <&vccsys>;
     59	};
     60
     61	/* This turns on vbus for host1 (dwc2) */
     62	vcc5_host1: vcc5-host1-regulator {
     63		compatible = "regulator-fixed";
     64		enable-active-high;
     65		gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
     66		pinctrl-names = "default";
     67		pinctrl-0 = <&host1_pwr_en>;
     68		regulator-name = "vcc5_host1";
     69		regulator-always-on;
     70		regulator-boot-on;
     71	};
     72
     73	/* This turns on vbus for otg for host mode (dwc2) */
     74	vcc5v_otg: vcc5v-otg-regulator {
     75		compatible = "regulator-fixed";
     76		enable-active-high;
     77		gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
     78		pinctrl-names = "default";
     79		pinctrl-0 = <&usbotg_pwren_h>;
     80		regulator-name = "vcc5_host2";
     81		regulator-always-on;
     82		regulator-boot-on;
     83	};
     84};
     85
     86&rk808 {
     87	vcc11-supply = <&vcc_5v>;
     88
     89	regulators {
     90		vcc33_ccd: LDO_REG8 {
     91			regulator-name = "vcc33_ccd";
     92			regulator-always-on;
     93			regulator-boot-on;
     94			regulator-min-microvolt = <3300000>;
     95			regulator-max-microvolt = <3300000>;
     96			regulator-state-mem {
     97				regulator-off-in-suspend;
     98			};
     99		};
    100	};
    101};
    102
    103&spi0 {
    104	status = "okay";
    105
    106	cros_ec: ec@0 {
    107		compatible = "google,cros-ec-spi";
    108		reg = <0>;
    109		google,cros-ec-spi-pre-delay = <30>;
    110		interrupt-parent = <&gpio7>;
    111		interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
    112		pinctrl-names = "default";
    113		pinctrl-0 = <&ec_int>;
    114		spi-max-frequency = <3000000>;
    115
    116		i2c_tunnel: i2c-tunnel {
    117			compatible = "google,cros-ec-i2c-tunnel";
    118			google,remote-bus = <0>;
    119			#address-cells = <1>;
    120			#size-cells = <0>;
    121		};
    122	};
    123};
    124
    125&i2c4 {
    126	trackpad@15 {
    127		compatible = "elan,ekth3000";
    128		reg = <0x15>;
    129		interrupt-parent = <&gpio7>;
    130		interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
    131		pinctrl-names = "default";
    132		pinctrl-0 = <&trackpad_int>;
    133		vcc-supply = <&vcc33_io>;
    134		wakeup-source;
    135	};
    136};
    137
    138&pinctrl {
    139	buttons {
    140		ap_lid_int_l: ap-lid-int-l {
    141			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
    142		};
    143	};
    144
    145	charger {
    146		ac_present_ap: ac-present-ap {
    147			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
    148		};
    149	};
    150
    151	cros-ec {
    152		ec_int: ec-int {
    153			rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
    154		};
    155	};
    156
    157	suspend {
    158		suspend_l_wake: suspend-l-wake {
    159			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
    160		};
    161
    162		suspend_l_sleep: suspend-l-sleep {
    163			rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>;
    164		};
    165	};
    166
    167	trackpad {
    168		trackpad_int: trackpad-int {
    169			rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
    170		};
    171	};
    172
    173	usb-host {
    174		host1_pwr_en: host1-pwr-en {
    175			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
    176		};
    177
    178		usbotg_pwren_h: usbotg-pwren-h {
    179			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
    180		};
    181	};
    182};
    183
    184#include "cros-ec-keyboard.dtsi"