cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rk3288-veyron-pinky.dts (2582B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Google Veyron Pinky Rev 2 board device tree source
      4 *
      5 * Copyright 2015 Google, Inc
      6 */
      7
      8/dts-v1/;
      9#include "rk3288-veyron-chromebook.dtsi"
     10#include "cros-ec-sbs.dtsi"
     11
     12/ {
     13	model = "Google Pinky";
     14	compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
     15		     "google,veyron", "rockchip,rk3288";
     16
     17	/delete-node/backlight-regulator;
     18	/delete-node/panel-regulator;
     19	/delete-node/emmc-pwrseq;
     20	/delete-node/vcc18-lcd;
     21};
     22
     23&backlight {
     24	/delete-property/power-supply;
     25};
     26
     27&emmc {
     28	/*
     29	 * Use a pullup instead of a drive since the output is 3.3V and
     30	 * really should be 1.8V (oops).  The external pulldown will help
     31	 * bring the voltage down if we only drive with a pullup here.
     32	 * Therefore disable the powerseq (and actual reset) for pinky.
     33	 */
     34	/delete-property/mmc-pwrseq;
     35	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_reset>;
     36};
     37
     38&edp {
     39	/delete-property/pinctrl-names;
     40	/delete-property/pinctrl-0;
     41
     42	force-hpd;
     43};
     44
     45&lid_switch {
     46	pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
     47
     48	power {
     49		gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
     50	};
     51};
     52
     53/* Touchpad connector */
     54&i2c3 {
     55	status = "okay";
     56
     57	clock-frequency = <400000>;
     58	i2c-scl-falling-time-ns = <50>;
     59	i2c-scl-rising-time-ns = <300>;
     60};
     61
     62&panel {
     63	power-supply = <&vcc33_lcd>;
     64};
     65
     66&pinctrl {
     67	pinctrl-names = "default", "sleep";
     68	pinctrl-0 = <
     69		/* Common for sleep and wake, but no owners */
     70		&ddr0_retention
     71		&ddrio_pwroff
     72		&global_pwroff
     73
     74		/* Wake only */
     75		&suspend_l_wake
     76		&bt_dev_wake_awake
     77	>;
     78	pinctrl-1 = <
     79		/* Common for sleep and wake, but no owners */
     80		&ddr0_retention
     81		&ddrio_pwroff
     82		&global_pwroff
     83
     84		/* Sleep only */
     85		&suspend_l_sleep
     86		&bt_dev_wake_sleep
     87	>;
     88
     89	/delete-node/ lcd;
     90
     91	backlight {
     92		/delete-node/ bl_pwr_en;
     93	};
     94
     95	buttons {
     96		pwr_key_h: pwr-key-h {
     97			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
     98		};
     99	};
    100
    101	emmc {
    102		emmc_reset: emmc-reset {
    103			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
    104		};
    105	};
    106
    107	sdmmc {
    108		sdmmc_wp_pin: sdmmc-wp-pin {
    109			rockchip,pins = <7 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
    110		};
    111	};
    112};
    113
    114&rk808 {
    115	regulators {
    116		vcc18_lcd: SWITCH_REG2 {
    117			regulator-always-on;
    118			regulator-boot-on;
    119			regulator-name = "vcc18_lcd";
    120			regulator-state-mem {
    121				regulator-off-in-suspend;
    122			};
    123		};
    124	};
    125};
    126
    127&sdmmc {
    128	pinctrl-names = "default";
    129	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
    130		     &sdmmc_wp_pin &sdmmc_bus4>;
    131	wp-gpios = <&gpio7 RK_PB2 GPIO_ACTIVE_HIGH>;
    132};
    133
    134&tsadc {
    135	/* Some connection is flaky making the tsadc hang the system */
    136	status = "disabled";
    137};