socfpga_cyclone5_socdk.dts (2788B)
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2012 Altera Corporation <www.altera.com> 4 */ 5 6#include "socfpga_cyclone5.dtsi" 7 8/ { 9 model = "Altera SOCFPGA Cyclone V SoC Development Kit"; 10 compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga"; 11 12 chosen { 13 bootargs = "earlyprintk"; 14 stdout-path = "serial0:115200n8"; 15 }; 16 17 memory@0 { 18 name = "memory"; 19 device_type = "memory"; 20 reg = <0x0 0x40000000>; /* 1GB */ 21 }; 22 23 aliases { 24 /* this allow the ethaddr uboot environmnet variable contents 25 * to be added to the gmac1 device tree blob. 26 */ 27 ethernet0 = &gmac1; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 hps0 { 33 label = "hps_led0"; 34 gpios = <&portb 15 1>; 35 }; 36 37 hps1 { 38 label = "hps_led1"; 39 gpios = <&portb 14 1>; 40 }; 41 42 hps2 { 43 label = "hps_led2"; 44 gpios = <&portb 13 1>; 45 }; 46 47 hps3 { 48 label = "hps_led3"; 49 gpios = <&portb 12 1>; 50 }; 51 }; 52 53 regulator_3_3v: regulator { 54 compatible = "regulator-fixed"; 55 regulator-name = "3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 }; 59}; 60 61&can0 { 62 status = "okay"; 63}; 64 65&gmac1 { 66 status = "okay"; 67 phy-mode = "rgmii"; 68 69 rxd0-skew-ps = <0>; 70 rxd1-skew-ps = <0>; 71 rxd2-skew-ps = <0>; 72 rxd3-skew-ps = <0>; 73 txen-skew-ps = <0>; 74 txc-skew-ps = <2600>; 75 rxdv-skew-ps = <0>; 76 rxc-skew-ps = <2000>; 77}; 78 79&gpio0 { 80 status = "okay"; 81}; 82 83&gpio1 { 84 status = "okay"; 85}; 86 87&gpio2 { 88 status = "okay"; 89}; 90 91&i2c0 { 92 status = "okay"; 93 clock-frequency = <100000>; 94 95 /* 96 * adjust the falling times to decrease the i2c frequency to 50Khz 97 * because the LCD module does not work at the standard 100Khz 98 */ 99 i2c-sda-falling-time-ns = <5000>; 100 i2c-scl-falling-time-ns = <5000>; 101 102 eeprom@51 { 103 compatible = "atmel,24c32"; 104 reg = <0x51>; 105 pagesize = <32>; 106 }; 107 108 rtc@68 { 109 compatible = "dallas,ds1339"; 110 reg = <0x68>; 111 }; 112}; 113 114&mmc0 { 115 cd-gpios = <&portb 18 0>; 116 vmmc-supply = <®ulator_3_3v>; 117 vqmmc-supply = <®ulator_3_3v>; 118 status = "okay"; 119}; 120 121&qspi { 122 status = "okay"; 123 124 flash0: flash@0 { 125 #address-cells = <1>; 126 #size-cells = <1>; 127 compatible = "micron,mt25qu02g", "jedec,spi-nor"; 128 reg = <0>; /* chip select */ 129 spi-max-frequency = <100000000>; 130 131 m25p,fast-read; 132 cdns,page-size = <256>; 133 cdns,block-size = <16>; 134 cdns,read-delay = <4>; 135 cdns,tshsl-ns = <50>; 136 cdns,tsd2d-ns = <50>; 137 cdns,tchsh-ns = <4>; 138 cdns,tslch-ns = <4>; 139 140 partition@qspi-boot { 141 /* 8MB for raw data. */ 142 label = "Flash 0 Raw Data"; 143 reg = <0x0 0x800000>; 144 }; 145 146 partition@qspi-rootfs { 147 /* 120MB for jffs2 data. */ 148 label = "Flash 0 jffs2 Filesystem"; 149 reg = <0x800000 0x7800000>; 150 }; 151 }; 152}; 153 154&spi0 { 155 status = "okay"; 156 157 spidev@0 { 158 compatible = "rohm,dh2228fv"; 159 reg = <0>; 160 spi-max-frequency = <1000000>; 161 }; 162}; 163 164&usb1 { 165 status = "okay"; 166};