cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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socfpga_vt.dts (1117B)

      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
      4 */
      5
      6/dts-v1/;
      7#include "socfpga.dtsi"
      8
      9/ {
     10	model = "Altera SOCFPGA VT";
     11	compatible = "altr,socfpga-vt", "altr,socfpga";
     12
     13	chosen {
     14		bootargs = "console=ttyS0,57600";
     15	};
     16
     17	memory@0 {
     18		name = "memory";
     19		device_type = "memory";
     20		reg = <0x0 0x40000000>; /* 1 GB */
     21	};
     22
     23	soc {
     24		clkmgr@ffd04000 {
     25			clocks {
     26				osc1 {
     27					clock-frequency = <10000000>;
     28				};
     29			};
     30		};
     31
     32		dwmmc0@ff704000 {
     33			broken-cd;
     34			bus-width = <4>;
     35			cap-mmc-highspeed;
     36			cap-sd-highspeed;
     37		};
     38
     39		ethernet@ff700000 {
     40			phy-mode = "gmii";
     41			status = "okay";
     42		};
     43
     44		timer0@ffc08000 {
     45			clock-frequency = <7000000>;
     46		};
     47
     48		timer1@ffc09000 {
     49			clock-frequency = <7000000>;
     50		};
     51
     52		timer2@ffd00000 {
     53			clock-frequency = <7000000>;
     54		};
     55
     56		timer3@ffd01000 {
     57			clock-frequency = <7000000>;
     58		};
     59
     60		serial0@ffc02000 {
     61			clock-frequency = <7372800>;
     62		};
     63
     64		serial1@ffc03000 {
     65			clock-frequency = <7372800>;
     66		};
     67
     68		sysmgr@ffd08000 {
     69			cpu1-start-addr = <0xffd08010>;
     70		};
     71	};
     72};
     73
     74&gmac0 {
     75	status = "okay";
     76	phy-mode = "gmii";
     77};