cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

spear320.dtsi (3356B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * DTS file for SPEAr320 SoC
      4 *
      5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
      6 */
      7
      8/include/ "spear3xx.dtsi"
      9
     10/ {
     11	ahb {
     12		#address-cells = <1>;
     13		#size-cells = <1>;
     14		compatible = "simple-bus";
     15		ranges = <0x40000000 0x40000000 0x80000000
     16			  0xd0000000 0xd0000000 0x30000000>;
     17
     18		pinmux: pinmux@b3000000 {
     19			compatible = "st,spear320-pinmux";
     20			reg = <0xb3000000 0x1000>;
     21			#gpio-range-cells = <3>;
     22		};
     23
     24		clcd@90000000 {
     25			compatible = "arm,pl110", "arm,primecell";
     26			reg = <0x90000000 0x1000>;
     27			interrupts = <8>;
     28			interrupt-parent = <&shirq>;
     29			status = "disabled";
     30		};
     31
     32		fsmc: flash@4c000000 {
     33			compatible = "st,spear600-fsmc-nand";
     34			#address-cells = <1>;
     35			#size-cells = <1>;
     36			reg = <0x4c000000 0x1000	/* FSMC Register */
     37			       0x50000000 0x0010	/* NAND Base DATA */
     38			       0x50020000 0x0010	/* NAND Base ADDR */
     39			       0x50010000 0x0010>;	/* NAND Base CMD */
     40			reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
     41			status = "disabled";
     42		};
     43
     44		sdhci@70000000 {
     45			compatible = "st,sdhci-spear";
     46			reg = <0x70000000 0x100>;
     47			interrupts = <10>;
     48			interrupt-parent = <&shirq>;
     49			status = "disabled";
     50		};
     51
     52		shirq: interrupt-controller@0xb3000000 {
     53			compatible = "st,spear320-shirq";
     54			reg = <0xb3000000 0x1000>;
     55			interrupts = <30 28 29 1>;
     56			#interrupt-cells = <1>;
     57			interrupt-controller;
     58		};
     59
     60		spi1: spi@a5000000 {
     61			compatible = "arm,pl022", "arm,primecell";
     62			reg = <0xa5000000 0x1000>;
     63			interrupts = <15>;
     64			interrupt-parent = <&shirq>;
     65			#address-cells = <1>;
     66			#size-cells = <0>;
     67			status = "disabled";
     68		};
     69
     70		spi2: spi@a6000000 {
     71			compatible = "arm,pl022", "arm,primecell";
     72			reg = <0xa6000000 0x1000>;
     73			interrupts = <16>;
     74			interrupt-parent = <&shirq>;
     75			#address-cells = <1>;
     76			#size-cells = <0>;
     77			status = "disabled";
     78		};
     79
     80		pwm: pwm@a8000000 {
     81			compatible ="st,spear-pwm";
     82			reg = <0xa8000000 0x1000>;
     83			#pwm-cells = <2>;
     84			status = "disabled";
     85                };
     86
     87		apb {
     88			#address-cells = <1>;
     89			#size-cells = <1>;
     90			compatible = "simple-bus";
     91			ranges = <0xa0000000 0xa0000000 0x20000000
     92				  0xd0000000 0xd0000000 0x30000000>;
     93
     94			i2c1: i2c@a7000000 {
     95				#address-cells = <1>;
     96				#size-cells = <0>;
     97				compatible = "snps,designware-i2c";
     98				reg = <0xa7000000 0x1000>;
     99				interrupts = <21>;
    100				interrupt-parent = <&shirq>;
    101				status = "disabled";
    102			};
    103
    104			serial@a3000000 {
    105				compatible = "arm,pl011", "arm,primecell";
    106				reg = <0xa3000000 0x1000>;
    107				interrupts = <13>;
    108				interrupt-parent = <&shirq>;
    109				status = "disabled";
    110			};
    111
    112			serial@a4000000 {
    113				compatible = "arm,pl011", "arm,primecell";
    114				reg = <0xa4000000 0x1000>;
    115				interrupts = <14>;
    116				interrupt-parent = <&shirq>;
    117				status = "disabled";
    118			};
    119
    120			gpiopinctrl: gpio@b3000000 {
    121				compatible = "st,spear-plgpio";
    122				reg = <0xb3000000 0x1000>;
    123				regmap = <&pinmux>;
    124				#interrupt-cells = <1>;
    125				interrupt-controller;
    126				gpio-controller;
    127				#gpio-cells = <2>;
    128				gpio-ranges = <&pinmux 0 0 102>;
    129				status = "disabled";
    130
    131				st-plgpio,ngpio = <102>;
    132				st-plgpio,enb-reg = <0x24>;
    133				st-plgpio,wdata-reg = <0x34>;
    134				st-plgpio,dir-reg = <0x44>;
    135				st-plgpio,ie-reg = <0x64>;
    136				st-plgpio,rdata-reg = <0x54>;
    137				st-plgpio,mis-reg = <0x84>;
    138				st-plgpio,eit-reg = <0x94>;
    139			};
    140		};
    141	};
    142};