cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

spear3xx.dtsi (3077B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * DTS file for all SPEAr3xx SoCs
      4 *
      5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
      6 */
      7
      8/ {
      9	#address-cells = <1>;
     10	#size-cells = <1>;
     11	interrupt-parent = <&vic>;
     12
     13	cpus {
     14		#address-cells = <0>;
     15		#size-cells = <0>;
     16
     17		cpu {
     18			compatible = "arm,arm926ej-s";
     19			device_type = "cpu";
     20		};
     21	};
     22
     23	memory {
     24		device_type = "memory";
     25		reg = <0 0x40000000>;
     26	};
     27
     28	ahb {
     29		#address-cells = <1>;
     30		#size-cells = <1>;
     31		compatible = "simple-bus";
     32		ranges = <0xd0000000 0xd0000000 0x30000000>;
     33
     34		vic: interrupt-controller@f1100000 {
     35			compatible = "arm,pl190-vic";
     36			interrupt-controller;
     37			reg = <0xf1100000 0x1000>;
     38			#interrupt-cells = <1>;
     39		};
     40
     41		dma@fc400000 {
     42			compatible = "arm,pl080", "arm,primecell";
     43			reg = <0xfc400000 0x1000>;
     44			interrupt-parent = <&vic>;
     45			interrupts = <8>;
     46			status = "disabled";
     47		};
     48
     49		gmac: eth@e0800000 {
     50			compatible = "snps,dwmac-3.40a";
     51			reg = <0xe0800000 0x8000>;
     52			interrupts = <23 22>;
     53			interrupt-names = "macirq", "eth_wake_irq";
     54			phy-mode = "mii";
     55			status = "disabled";
     56		};
     57
     58		smi: flash@fc000000 {
     59			compatible = "st,spear600-smi";
     60			#address-cells = <1>;
     61			#size-cells = <1>;
     62			reg = <0xfc000000 0x1000>;
     63			interrupts = <9>;
     64			status = "disabled";
     65		};
     66
     67		spi0: spi@d0100000 {
     68			compatible = "arm,pl022", "arm,primecell";
     69			reg = <0xd0100000 0x1000>;
     70			interrupts = <20>;
     71			#address-cells = <1>;
     72			#size-cells = <0>;
     73			status = "disabled";
     74		};
     75
     76		ehci@e1800000 {
     77			compatible = "st,spear600-ehci", "usb-ehci";
     78			reg = <0xe1800000 0x1000>;
     79			interrupts = <26>;
     80			status = "disabled";
     81		};
     82
     83		ohci@e1900000 {
     84			compatible = "st,spear600-ohci", "usb-ohci";
     85			reg = <0xe1900000 0x1000>;
     86			interrupts = <25>;
     87			status = "disabled";
     88		};
     89
     90		ohci@e2100000 {
     91			compatible = "st,spear600-ohci", "usb-ohci";
     92			reg = <0xe2100000 0x1000>;
     93			interrupts = <27>;
     94			status = "disabled";
     95		};
     96
     97		apb {
     98			#address-cells = <1>;
     99			#size-cells = <1>;
    100			compatible = "simple-bus";
    101			ranges = <0xd0000000 0xd0000000 0x30000000>;
    102
    103			gpio0: gpio@fc980000 {
    104				compatible = "arm,pl061", "arm,primecell";
    105				reg = <0xfc980000 0x1000>;
    106				interrupts = <11>;
    107				gpio-controller;
    108				#gpio-cells = <2>;
    109				interrupt-controller;
    110				#interrupt-cells = <2>;
    111				status = "disabled";
    112			};
    113
    114			i2c0: i2c@d0180000 {
    115				#address-cells = <1>;
    116				#size-cells = <0>;
    117				compatible = "snps,designware-i2c";
    118				reg = <0xd0180000 0x1000>;
    119				interrupts = <21>;
    120				status = "disabled";
    121			};
    122
    123			rtc@fc900000 {
    124				compatible = "st,spear600-rtc";
    125				reg = <0xfc900000 0x1000>;
    126				interrupts = <10>;
    127				status = "disabled";
    128			};
    129
    130			serial@d0000000 {
    131				compatible = "arm,pl011", "arm,primecell";
    132				reg = <0xd0000000 0x1000>;
    133				interrupts = <19>;
    134				status = "disabled";
    135			};
    136
    137			wdt@fc880000 {
    138				compatible = "arm,sp805", "arm,primecell";
    139				reg = <0xfc880000 0x1000>;
    140				interrupts = <12>;
    141				status = "disabled";
    142			};
    143
    144			timer@f0000000 {
    145				compatible = "st,spear-timer";
    146				reg = <0xf0000000 0x400>;
    147				interrupts = <2>;
    148			};
    149		};
    150	};
    151};