cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

spear600-evb.dts (1432B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2012 Stefan Roese <sr@denx.de>
      4 */
      5
      6/dts-v1/;
      7/include/ "spear600.dtsi"
      8
      9/ {
     10	model = "ST SPEAr600 Evaluation Board";
     11	compatible = "st,spear600-evb", "st,spear600";
     12	#address-cells = <1>;
     13	#size-cells = <1>;
     14
     15	memory {
     16		device_type = "memory";
     17		reg = <0 0x10000000>;
     18	};
     19};
     20
     21&clcd {
     22	status = "okay";
     23};
     24
     25&dmac {
     26	status = "okay";
     27};
     28
     29&ehci_usb0 {
     30	status = "okay";
     31};
     32
     33&ehci_usb1 {
     34	status = "okay";
     35};
     36
     37&gmac {
     38	phy-mode = "gmii";
     39	status = "okay";
     40};
     41
     42&ohci_usb0 {
     43	status = "okay";
     44};
     45
     46&ohci_usb1 {
     47	status = "okay";
     48};
     49
     50&smi {
     51	status = "okay";
     52	clock-rate = <50000000>;
     53
     54	flash@f8000000 {
     55		reg = <0xf8000000 0x800000>;
     56		st,smi-fast-mode;
     57
     58		partitions {
     59			compatible = "fixed-partitions";
     60			#address-cells = <1>;
     61			#size-cells = <1>;
     62
     63			partition@0 {
     64				label = "xloader";
     65				reg = <0x0 0x10000>;
     66			};
     67			partition@10000 {
     68				label = "u-boot";
     69				reg = <0x10000 0x50000>;
     70			};
     71			partition@60000 {
     72				label = "environment";
     73				reg = <0x60000 0x10000>;
     74			};
     75			partition@70000 {
     76				label = "dtb";
     77				reg = <0x70000 0x10000>;
     78			};
     79			partition@80000 {
     80				label = "linux";
     81				reg = <0x80000 0x310000>;
     82			};
     83			partition@390000 {
     84				label = "rootfs";
     85				reg = <0x390000 0x0>;
     86			};
     87		};
     88	};
     89};
     90
     91&uart0 {
     92	status = "okay";
     93};
     94
     95&uart1 {
     96	status = "okay";
     97};
     98
     99&rtc {
    100	status = "okay";
    101};
    102
    103&i2c {
    104	clock-frequency = <400000>;
    105	status = "okay";
    106};