cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ste-href.dtsi (6522B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2012 ST-Ericsson AB
      4 */
      5
      6#include <dt-bindings/interrupt-controller/irq.h>
      7#include <dt-bindings/leds/common.h>
      8#include "ste-href-family-pinctrl.dtsi"
      9
     10/ {
     11	memory {
     12		device_type = "memory";
     13		reg = <0x00000000 0x20000000>;
     14	};
     15
     16	battery: battery {
     17		compatible = "simple-battery";
     18		battery-type = "lithium-ion-polymer";
     19	};
     20
     21	thermal-zones {
     22		battery-thermal {
     23			/* This zone will be polled by the battery temperature code */
     24			polling-delay = <0>;
     25			polling-delay-passive = <0>;
     26			thermal-sensors = <&bat_therm>;
     27		};
     28	};
     29
     30	bat_therm: thermistor {
     31		compatible = "murata,ncp18wb473";
     32		io-channels = <&gpadc 0x02>; /* BatTemp */
     33		pullup-uv = <1800000>;
     34		pullup-ohm = <230000>;
     35		pulldown-ohm = <0>;
     36		#thermal-sensor-cells = <0>;
     37	};
     38
     39	soc {
     40		uart@80120000 {
     41			pinctrl-names = "default", "sleep";
     42			pinctrl-0 = <&u0_a_1_default>;
     43			pinctrl-1 = <&u0_a_1_sleep>;
     44			status = "okay";
     45		};
     46
     47		/* This UART is unused and thus left disabled */
     48		uart@80121000 {
     49			pinctrl-names = "default", "sleep";
     50			pinctrl-0 = <&u1rxtx_a_1_default>;
     51			pinctrl-1 = <&u1rxtx_a_1_sleep>;
     52		};
     53
     54		uart@80007000 {
     55			pinctrl-names = "default", "sleep";
     56			pinctrl-0 = <&u2rxtx_c_1_default>;
     57			pinctrl-1 = <&u2rxtx_c_1_sleep>;
     58			status = "okay";
     59		};
     60
     61		i2c@80004000 {
     62			pinctrl-names = "default","sleep";
     63			pinctrl-0 = <&i2c0_a_1_default>;
     64			pinctrl-1 = <&i2c0_a_1_sleep>;
     65			status = "okay";
     66		};
     67
     68		i2c@80122000 {
     69			pinctrl-names = "default","sleep";
     70			pinctrl-0 = <&i2c1_b_2_default>;
     71			pinctrl-1 = <&i2c1_b_2_sleep>;
     72			status = "okay";
     73		};
     74
     75		i2c@80128000 {
     76			pinctrl-names = "default","sleep";
     77			pinctrl-0 = <&i2c2_b_2_default>;
     78			pinctrl-1 = <&i2c2_b_2_sleep>;
     79			status = "okay";
     80			lp5521@33 {
     81				compatible = "national,lp5521";
     82				reg = <0x33>;
     83				label = "lp5521_pri";
     84				clock-mode = /bits/ 8 <2>;
     85				#address-cells = <1>;
     86				#size-cells = <0>;
     87				chan@0 {
     88					reg = <0>;
     89					led-cur = /bits/ 8 <0x2f>;
     90					max-cur = /bits/ 8 <0x5f>;
     91					color = <LED_COLOR_ID_BLUE>;
     92					linux,default-trigger = "heartbeat";
     93				};
     94				chan@1 {
     95					reg = <1>;
     96					led-cur = /bits/ 8 <0x2f>;
     97					max-cur = /bits/ 8 <0x5f>;
     98					color = <LED_COLOR_ID_BLUE>;
     99				};
    100				chan@2 {
    101					reg = <2>;
    102					led-cur = /bits/ 8 <0x2f>;
    103					max-cur = /bits/ 8 <0x5f>;
    104					color = <LED_COLOR_ID_BLUE>;
    105				};
    106			};
    107			lp5521@34 {
    108				compatible = "national,lp5521";
    109				reg = <0x34>;
    110				label = "lp5521_sec";
    111				clock-mode = /bits/ 8 <2>;
    112				#address-cells = <1>;
    113				#size-cells = <0>;
    114				chan@0 {
    115					reg = <0>;
    116					led-cur = /bits/ 8 <0x2f>;
    117					max-cur = /bits/ 8 <0x5f>;
    118					color = <LED_COLOR_ID_BLUE>;
    119				};
    120				chan@1 {
    121					reg = <1>;
    122					led-cur = /bits/ 8 <0x2f>;
    123					max-cur = /bits/ 8 <0x5f>;
    124					color = <LED_COLOR_ID_BLUE>;
    125				};
    126				chan@2 {
    127					reg = <2>;
    128					led-cur = /bits/ 8 <0x2f>;
    129					max-cur = /bits/ 8 <0x5f>;
    130					color = <LED_COLOR_ID_BLUE>;
    131				};
    132			};
    133			bh1780@29 {
    134				compatible = "rohm,bh1780gli";
    135				reg = <0x29>;
    136			};
    137		};
    138
    139		i2c@80110000 {
    140			pinctrl-names = "default","sleep";
    141			pinctrl-0 = <&i2c3_c_2_default>;
    142			pinctrl-1 = <&i2c3_c_2_sleep>;
    143			status = "okay";
    144		};
    145
    146		// External Micro SD slot
    147		mmc@80126000 {
    148			arm,primecell-periphid = <0x10480180>;
    149			max-frequency = <100000000>;
    150			bus-width = <4>;
    151			cap-sd-highspeed;
    152			cap-mmc-highspeed;
    153			sd-uhs-sdr12;
    154			sd-uhs-sdr25;
    155			full-pwr-cycle;
    156			st,sig-dir-dat0;
    157			st,sig-dir-dat2;
    158			st,sig-dir-cmd;
    159			st,sig-pin-fbclk;
    160			vmmc-supply = <&ab8500_ldo_aux3_reg>;
    161			vqmmc-supply = <&vmmci>;
    162			pinctrl-names = "default", "sleep";
    163			pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
    164			pinctrl-1 = <&mc0_a_1_sleep>;
    165
    166			status = "okay";
    167		};
    168
    169		// WLAN SDIO channel
    170		mmc@80118000 {
    171			arm,primecell-periphid = <0x10480180>;
    172			max-frequency = <100000000>;
    173			bus-width = <4>;
    174			non-removable;
    175			pinctrl-names = "default", "sleep";
    176			pinctrl-0 = <&mc1_a_1_default>;
    177			pinctrl-1 = <&mc1_a_1_sleep>;
    178
    179			status = "okay";
    180		};
    181
    182		// PoP:ed eMMC
    183		mmc@80005000 {
    184			arm,primecell-periphid = <0x10480180>;
    185			max-frequency = <100000000>;
    186			bus-width = <8>;
    187			cap-mmc-highspeed;
    188			non-removable;
    189			no-sdio;
    190			no-sd;
    191			vmmc-supply = <&db8500_vsmps2_reg>;
    192			pinctrl-names = "default", "sleep";
    193			pinctrl-0 = <&mc2_a_1_default>;
    194			pinctrl-1 = <&mc2_a_1_sleep>;
    195
    196			status = "okay";
    197		};
    198
    199		// On-board eMMC
    200		mmc@80114000 {
    201			arm,primecell-periphid = <0x10480180>;
    202		        max-frequency = <100000000>;
    203			bus-width = <8>;
    204			cap-mmc-highspeed;
    205			non-removable;
    206			no-sdio;
    207			no-sd;
    208			vmmc-supply = <&ab8500_ldo_aux2_reg>;
    209			pinctrl-names = "default", "sleep";
    210			pinctrl-0 = <&mc4_a_1_default>;
    211			pinctrl-1 = <&mc4_a_1_sleep>;
    212
    213			status = "okay";
    214		};
    215
    216		msp0: msp@80123000 {
    217			pinctrl-names = "default";
    218			pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
    219			status = "okay";
    220		};
    221
    222		msp1: msp@80124000 {
    223			pinctrl-names = "default";
    224			pinctrl-0 = <&msp1txrx_a_1_default>;
    225			status = "okay";
    226		};
    227
    228		msp2: msp@80117000 {
    229			pinctrl-names = "default";
    230			pinctrl-0 = <&msp2_a_1_default>;
    231		};
    232
    233		msp3: msp@80125000 {
    234			status = "okay";
    235		};
    236
    237		prcmu@80157000 {
    238			ab8500 {
    239				gpio {
    240				};
    241
    242				phy {
    243					pinctrl-names = "default", "sleep";
    244					pinctrl-0 = <&usb_a_1_default>;
    245					pinctrl-1 = <&usb_a_1_sleep>;
    246				};
    247
    248				regulator {
    249					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
    250						regulator-name = "V-DISPLAY";
    251					};
    252
    253					ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
    254						regulator-name = "V-eMMC1";
    255					};
    256
    257					ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
    258						regulator-name = "V-MMC-SD";
    259					};
    260
    261					ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
    262						regulator-name = "V-INTCORE";
    263					};
    264
    265					ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
    266						regulator-name = "V-TVOUT";
    267					};
    268
    269					ab8500_ldo_audio_reg: ab8500_ldo_audio {
    270						regulator-name = "V-AUD";
    271					};
    272
    273					ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
    274						regulator-name = "V-AMIC1";
    275					};
    276
    277					ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
    278						regulator-name = "V-AMIC2";
    279					};
    280
    281					ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
    282						regulator-name = "V-DMIC";
    283					};
    284
    285					ab8500_ldo_ana_reg: ab8500_ldo_ana {
    286						regulator-name = "V-CSI/DSI";
    287					};
    288				};
    289			};
    290		};
    291
    292		pinctrl {
    293			sdi0 {
    294				sdi0_default_mode: sdi0_default {
    295					/* Some boards set additional settings here */
    296				};
    297			};
    298		};
    299
    300		mcde@a0350000 {
    301			pinctrl-names = "default", "sleep";
    302			pinctrl-0 = <&lcd_default_mode>;
    303			pinctrl-1 = <&lcd_sleep_mode>;
    304		};
    305	};
    306};