cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ste-hrefv60plus-stuib.dts (1715B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2012 ST-Ericsson AB
      4 *
      5 * Device Tree for the HREF version 60 or later with the ST UIB
      6 */
      7
      8/dts-v1/;
      9#include "ste-db8500.dtsi"
     10#include "ste-hrefv60plus.dtsi"
     11#include "ste-href-stuib.dtsi"
     12
     13/ {
     14	model = "ST-Ericsson HREF (v60+) and ST UIB";
     15	compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
     16
     17	/* ST6G3244ME level translator for 1.8/2.9 V */
     18	vmmci: regulator-gpio {
     19		compatible = "regulator-gpio";
     20
     21		regulator-min-microvolt = <1800000>;
     22		regulator-max-microvolt = <2900000>;
     23		regulator-name = "mmci-reg";
     24		regulator-type = "voltage";
     25
     26		startup-delay-us = <100>;
     27
     28		states = <1800000 0x1
     29			  2900000 0x0>;
     30
     31		gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
     32		enable-gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
     33		enable-active-high;
     34
     35		pinctrl-names = "default";
     36		pinctrl-0 = <&vmmci_default_mode>;
     37	};
     38
     39	soc {
     40		/* Reset line for the BU21013 touchscreen */
     41		i2c@80110000 {
     42			/* Only one of these will be used */
     43			bu21013_tp@5c {
     44				interrupt-parent = <&gpio2>;
     45				interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
     46				touch-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
     47				reset-gpios = <&gpio4 17 GPIO_LINE_OPEN_DRAIN>;
     48			};
     49			bu21013_tp@5d {
     50				interrupt-parent = <&gpio2>;
     51				interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
     52				touch-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
     53				reset-gpios = <&gpio4 17 GPIO_LINE_OPEN_DRAIN>;
     54			};
     55		};
     56	};
     57};
     58
     59&pinctrl {
     60	vmmci {
     61		vmmci_default_mode: vmmc_default {
     62			/* VMMCI level-shifter enable */
     63			default_hrefv60_cfg2 {
     64				pins = "GPIO169_D22";
     65				ste,config = <&gpio_out_hi>;
     66			};
     67			/* VMMCI level-shifter voltage select */
     68			default_hrefv60_cfg3 {
     69				pins = "GPIO5_AG6";
     70				ste,config = <&gpio_out_hi>;
     71			};
     72		};
     73	};
     74};