cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

stm32f769-disco.dts (4298B)

      1/*
      2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43/dts-v1/;
     44#include "stm32f746.dtsi"
     45#include "stm32f769-pinctrl.dtsi"
     46#include <dt-bindings/input/input.h>
     47#include <dt-bindings/gpio/gpio.h>
     48
     49/ {
     50	model = "STMicroelectronics STM32F769-DISCO board";
     51	compatible = "st,stm32f769-disco", "st,stm32f769";
     52
     53	chosen {
     54		bootargs = "root=/dev/ram";
     55		stdout-path = "serial0:115200n8";
     56	};
     57
     58	memory@c0000000 {
     59		device_type = "memory";
     60		reg = <0xC0000000 0x1000000>;
     61	};
     62
     63	aliases {
     64		serial0 = &usart1;
     65	};
     66
     67	leds {
     68		compatible = "gpio-leds";
     69		led-green {
     70			gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>;
     71			linux,default-trigger = "heartbeat";
     72		};
     73		led-red {
     74			gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
     75		};
     76	};
     77
     78	gpio-keys {
     79		compatible = "gpio-keys";
     80		autorepeat;
     81		button-0 {
     82			label = "User";
     83			linux,code = <KEY_HOME>;
     84			gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
     85		};
     86	};
     87
     88	usbotg_hs_phy: usb-phy {
     89		#phy-cells = <0>;
     90		compatible = "usb-nop-xceiv";
     91		clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
     92		clock-names = "main_clk";
     93	};
     94
     95	mmc_vcard: mmc_vcard {
     96		compatible = "regulator-fixed";
     97		regulator-name = "mmc_vcard";
     98		regulator-min-microvolt = <3300000>;
     99		regulator-max-microvolt = <3300000>;
    100	};
    101};
    102
    103&rcc {
    104	compatible = "st,stm32f769-rcc", "st,stm32f746-rcc", "st,stm32-rcc";
    105};
    106
    107&cec {
    108	pinctrl-0 = <&cec_pins_a>;
    109	pinctrl-names = "default";
    110	status = "okay";
    111};
    112
    113&clk_hse {
    114	clock-frequency = <25000000>;
    115};
    116
    117&i2c1 {
    118	pinctrl-0 = <&i2c1_pins_b>;
    119	pinctrl-names = "default";
    120	i2c-scl-rising-time-ns = <185>;
    121	i2c-scl-falling-time-ns = <20>;
    122	status = "okay";
    123};
    124
    125&rtc {
    126	status = "okay";
    127};
    128
    129&sdio2 {
    130	status = "okay";
    131	vmmc-supply = <&mmc_vcard>;
    132	cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
    133	broken-cd;
    134	pinctrl-names = "default", "opendrain";
    135	pinctrl-0 = <&sdio_pins_b>;
    136	pinctrl-1 = <&sdio_pins_od_b>;
    137	bus-width = <4>;
    138};
    139
    140&timers5 {
    141	/* Override timer5 to act as clockevent */
    142	compatible = "st,stm32-timer";
    143	interrupts = <50>;
    144	status = "okay";
    145	/delete-property/#address-cells;
    146	/delete-property/#size-cells;
    147	/delete-property/clock-names;
    148	/delete-node/pwm;
    149	/delete-node/timer@4;
    150};
    151
    152&usart1 {
    153	pinctrl-0 = <&usart1_pins_a>;
    154	pinctrl-names = "default";
    155	status = "okay";
    156};
    157
    158&usbotg_hs {
    159	dr_mode = "otg";
    160	phys = <&usbotg_hs_phy>;
    161	phy-names = "usb2-phy";
    162	pinctrl-0 = <&usbotg_hs_pins_a>;
    163	pinctrl-names = "default";
    164	status = "okay";
    165};