cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32mp13-pinctrl.dtsi (3285B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
      2/*
      3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
      4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
      5 */
      6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
      7
      8&pinctrl {
      9	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
     10		pins {
     11			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
     12				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
     13				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
     14				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
     15				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
     16			slew-rate = <1>;
     17			drive-push-pull;
     18			bias-disable;
     19		};
     20	};
     21
     22	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
     23		pins1 {
     24			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
     25				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
     26				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
     27				 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
     28			slew-rate = <1>;
     29			drive-push-pull;
     30			bias-disable;
     31		};
     32		pins2 {
     33			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
     34			slew-rate = <1>;
     35			drive-open-drain;
     36			bias-disable;
     37		};
     38	};
     39
     40	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
     41		pins {
     42			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
     43				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
     44				 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
     45				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
     46				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
     47				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
     48		};
     49	};
     50
     51	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
     52		pins {
     53			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
     54			slew-rate = <1>;
     55			drive-push-pull;
     56			bias-disable;
     57		};
     58	};
     59
     60	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
     61		pins {
     62			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
     63				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
     64				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
     65				 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
     66				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
     67			slew-rate = <1>;
     68			drive-push-pull;
     69			bias-pull-up;
     70		};
     71	};
     72
     73	sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
     74		pins1 {
     75			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
     76				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
     77				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
     78				 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
     79			slew-rate = <1>;
     80			drive-push-pull;
     81			bias-pull-up;
     82		};
     83		pins2 {
     84			pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
     85			slew-rate = <1>;
     86			drive-open-drain;
     87			bias-pull-up;
     88		};
     89	};
     90
     91	sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
     92		pins {
     93			pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
     94				 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
     95				 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
     96				 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
     97				 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
     98				 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
     99		};
    100	};
    101
    102	sdmmc2_clk_pins_a: sdmmc2-clk-0 {
    103		pins {
    104			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
    105			slew-rate = <1>;
    106			drive-push-pull;
    107			bias-pull-up;
    108		};
    109	};
    110
    111	uart4_pins_a: uart4-0 {
    112		pins1 {
    113			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
    114			bias-disable;
    115			drive-push-pull;
    116			slew-rate = <0>;
    117		};
    118		pins2 {
    119			pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
    120			bias-disable;
    121		};
    122	};
    123};