cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32mp133.dtsi (1095B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
      2/*
      3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
      4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
      5 */
      6
      7#include "stm32mp131.dtsi"
      8
      9/ {
     10	soc {
     11		m_can1: can@4400e000 {
     12			compatible = "bosch,m_can";
     13			reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
     14			reg-names = "m_can", "message_ram";
     15			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
     16				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
     17			interrupt-names = "int0", "int1";
     18			clocks = <&clk_hse>, <&clk_pll4_r>;
     19			clock-names = "hclk", "cclk";
     20			bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
     21			status = "disabled";
     22		};
     23
     24		m_can2: can@4400f000 {
     25			compatible = "bosch,m_can";
     26			reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
     27			reg-names = "m_can", "message_ram";
     28			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
     29				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
     30			interrupt-names = "int0", "int1";
     31			clocks = <&clk_hse>, <&clk_pll4_r>;
     32			clock-names = "hclk", "cclk";
     33			bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
     34			status = "disabled";
     35		};
     36	};
     37};