cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts (4110B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
      2/*
      3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
      4 * Copyright (c) 2020 Engicam srl
      5 * Copyright (c) 2020 Amarula Solutons(India)
      6 */
      7
      8/dts-v1/;
      9#include "stm32mp157.dtsi"
     10#include "stm32mp157a-microgea-stm32mp1.dtsi"
     11#include "stm32mp15-pinctrl.dtsi"
     12#include "stm32mp15xxaa-pinctrl.dtsi"
     13#include <dt-bindings/gpio/gpio.h>
     14
     15/ {
     16	model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 7\" Open Frame";
     17	compatible = "engicam,microgea-stm32mp1-microdev2.0-of7",
     18		     "engicam,microgea-stm32mp1", "st,stm32mp157";
     19
     20	aliases {
     21		serial0 = &uart4;
     22		serial1 = &uart8;
     23	};
     24
     25	chosen {
     26		stdout-path = "serial0:115200n8";
     27	};
     28
     29	backlight: backlight {
     30		compatible = "gpio-backlight";
     31		gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
     32		default-on;
     33	};
     34
     35	lcd_3v3: regulator-lcd-3v3 {
     36		compatible = "regulator-fixed";
     37		regulator-name = "lcd_3v3";
     38		regulator-min-microvolt = <3300000>;
     39		regulator-max-microvolt = <3300000>;
     40		gpio = <&gpiof 10 GPIO_ACTIVE_HIGH>;
     41		enable-active-high;
     42		regulator-always-on;
     43		power-supply = <&panel_pwr>;
     44	};
     45
     46	panel_pwr: regulator-panel-pwr {
     47		compatible = "regulator-fixed";
     48		regulator-name = "panel_pwr";
     49		regulator-min-microvolt = <3300000>;
     50		regulator-max-microvolt = <3300000>;
     51		gpio = <&gpiob 10 GPIO_ACTIVE_HIGH>;
     52		regulator-always-on;
     53	};
     54
     55	panel {
     56		compatible = "auo,b101aw03";
     57		backlight = <&backlight>;
     58		enable-gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>;
     59		power-supply = <&lcd_3v3>;
     60
     61		port {
     62			panel_in: endpoint {
     63				remote-endpoint = <&ltdc_ep0_out>;
     64			};
     65		};
     66	};
     67};
     68
     69&i2c2 {
     70	i2c-scl-falling-time-ns = <20>;
     71	i2c-scl-rising-time-ns = <185>;
     72	pinctrl-names = "default", "sleep";
     73	pinctrl-0 = <&i2c2_pins_a>;
     74	pinctrl-1 = <&i2c2_sleep_pins_a>;
     75	status = "okay";
     76};
     77
     78&ltdc {
     79	pinctrl-names = "default";
     80	pinctrl-0 = <&ltdc_pins>;
     81	status = "okay";
     82
     83	port {
     84		ltdc_ep0_out: endpoint@0 {
     85			reg = <0>;
     86			remote-endpoint = <&panel_in>;
     87		};
     88	};
     89};
     90
     91&pinctrl {
     92	ltdc_pins: ltdc-0 {
     93		pins {
     94			pinmux = <STM32_PINMUX('G', 10, AF14)>,	/* LTDC_B2 */
     95				 <STM32_PINMUX('H', 12, AF14)>,	/* LTDC_R6 */
     96				 <STM32_PINMUX('H', 11, AF14)>,	/* LTDC_R5 */
     97				 <STM32_PINMUX('D', 10, AF14)>,	/* LTDC_B3 */
     98				 <STM32_PINMUX('D', 9, AF14)>,	/* LTDC_B0 */
     99				 <STM32_PINMUX('E', 5, AF14)>,	/* LTDC_G0 */
    100				 <STM32_PINMUX('E', 6, AF14)>,	/* LTDC_G1 */
    101				 <STM32_PINMUX('E', 13, AF14)>,	/* LTDC_DE */
    102				 <STM32_PINMUX('E', 15, AF14)>,	/* LTDC_R7 */
    103				 <STM32_PINMUX('G', 7, AF14)>,	/* LTDC_CLK */
    104				 <STM32_PINMUX('G', 12, AF14)>,	/* LTDC_B1 */
    105				 <STM32_PINMUX('H', 2, AF14)>,	/* LTDC_R0 */
    106				 <STM32_PINMUX('H', 3, AF14)>,	/* LTDC_R1 */
    107				 <STM32_PINMUX('H', 8, AF14)>,	/* LTDC_R2 */
    108				 <STM32_PINMUX('H', 9, AF14)>,	/* LTDC_R3 */
    109				 <STM32_PINMUX('H', 10, AF14)>,	/* LTDC_R4 */
    110				 <STM32_PINMUX('H', 13, AF14)>,	/* LTDC_G2 */
    111				 <STM32_PINMUX('H', 14, AF14)>,	/* LTDC_G3 */
    112				 <STM32_PINMUX('H', 15, AF14)>,	/* LTDC_G4 */
    113				 <STM32_PINMUX('I', 0, AF14)>,	/* LTDC_G5 */
    114				 <STM32_PINMUX('I', 1, AF14)>,	/* LTDC_G6 */
    115				 <STM32_PINMUX('I', 2, AF14)>,	/* LTDC_G7 */
    116				 <STM32_PINMUX('I', 4, AF14)>,	/* LTDC_B4 */
    117				 <STM32_PINMUX('I', 5, AF14)>,	/* LTDC_B5 */
    118				 <STM32_PINMUX('B', 8, AF14)>,	/* LTDC_B6 */
    119				 <STM32_PINMUX('I', 7, AF14)>,	/* LTDC_B7 */
    120				 <STM32_PINMUX('I', 9, AF14)>,	/* LTDC_VSYNC */
    121				 <STM32_PINMUX('I', 10, AF14)>;	/* LTDC_HSYNC */
    122			bias-disable;
    123			drive-push-pull;
    124			slew-rate = <3>;
    125		};
    126	};
    127};
    128
    129&sdmmc1 {
    130	bus-width = <4>;
    131	disable-wp;
    132	pinctrl-names = "default", "opendrain", "sleep";
    133	pinctrl-0 = <&sdmmc1_b4_pins_a>;
    134	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
    135	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
    136	st,neg-edge;
    137	vmmc-supply = <&vdd>;
    138	status = "okay";
    139};
    140
    141&uart4 {
    142	pinctrl-names = "default", "sleep", "idle";
    143	pinctrl-0 = <&uart4_pins_a>;
    144	pinctrl-1 = <&uart4_sleep_pins_a>;
    145	pinctrl-2 = <&uart4_idle_pins_a>;
    146	/delete-property/dmas;
    147	/delete-property/dma-names;
    148	status = "okay";
    149};
    150
    151/* J31: RS323 */
    152&uart8 {
    153	pinctrl-names = "default";
    154	pinctrl-0 = <&uart8_pins_a>;
    155	/delete-property/dmas;
    156	/delete-property/dma-names;
    157	status = "okay";
    158};