cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32mp157a-microgea-stm32mp1-microdev2.0.dts (1334B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
      2/*
      3 * Copyright (c) STMicroelectronics 2019 - All Rights Reserved
      4 * Copyright (c) 2020 Engicam srl
      5 * Copyright (c) 2020 Amarula Solutons(India)
      6 */
      7
      8/dts-v1/;
      9#include "stm32mp157.dtsi"
     10#include "stm32mp157a-microgea-stm32mp1.dtsi"
     11#include "stm32mp15-pinctrl.dtsi"
     12#include "stm32mp15xxaa-pinctrl.dtsi"
     13#include <dt-bindings/gpio/gpio.h>
     14
     15/ {
     16	model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
     17	compatible = "engicam,microgea-stm32mp1-microdev2.0",
     18		     "engicam,microgea-stm32mp1", "st,stm32mp157";
     19
     20	aliases {
     21		serial0 = &uart4;
     22		serial1 = &uart8;
     23	};
     24
     25	chosen {
     26		stdout-path = "serial0:115200n8";
     27	};
     28};
     29
     30&sdmmc1 {
     31	bus-width = <4>;
     32	disable-wp;
     33	pinctrl-names = "default", "opendrain", "sleep";
     34	pinctrl-0 = <&sdmmc1_b4_pins_a>;
     35	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
     36	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
     37	st,neg-edge;
     38	vmmc-supply = <&vdd>;
     39	status = "okay";
     40};
     41
     42&uart4 {
     43	pinctrl-names = "default", "sleep", "idle";
     44	pinctrl-0 = <&uart4_pins_a>;
     45	pinctrl-1 = <&uart4_sleep_pins_a>;
     46	pinctrl-2 = <&uart4_idle_pins_a>;
     47	/delete-property/dmas;
     48	/delete-property/dma-names;
     49	status = "okay";
     50};
     51
     52/* J31: RS323 */
     53&uart8 {
     54	pinctrl-names = "default";
     55	pinctrl-0 = <&uart8_pins_a>;
     56	/delete-property/dmas;
     57	/delete-property/dma-names;
     58	status = "okay";
     59};