cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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stm32mp15xx-dhcor-som.dtsi (5718B)


      1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
      2/*
      3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
      4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
      5 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
      6 */
      7
      8#include "stm32mp15-pinctrl.dtsi"
      9#include "stm32mp15xxac-pinctrl.dtsi"
     10#include <dt-bindings/gpio/gpio.h>
     11#include <dt-bindings/mfd/st,stpmic1.h>
     12
     13/ {
     14	aliases {
     15		spi0 = &qspi;
     16	};
     17
     18	memory@c0000000 {
     19		device_type = "memory";
     20		reg = <0xc0000000 0x40000000>;
     21	};
     22
     23	reserved-memory {
     24		#address-cells = <1>;
     25		#size-cells = <1>;
     26		ranges;
     27
     28		mcuram2: mcuram2@10000000 {
     29			compatible = "shared-dma-pool";
     30			reg = <0x10000000 0x40000>;
     31			no-map;
     32		};
     33
     34		vdev0vring0: vdev0vring0@10040000 {
     35			compatible = "shared-dma-pool";
     36			reg = <0x10040000 0x1000>;
     37			no-map;
     38		};
     39
     40		vdev0vring1: vdev0vring1@10041000 {
     41			compatible = "shared-dma-pool";
     42			reg = <0x10041000 0x1000>;
     43			no-map;
     44		};
     45
     46		vdev0buffer: vdev0buffer@10042000 {
     47			compatible = "shared-dma-pool";
     48			reg = <0x10042000 0x4000>;
     49			no-map;
     50		};
     51
     52		mcuram: mcuram@30000000 {
     53			compatible = "shared-dma-pool";
     54			reg = <0x30000000 0x40000>;
     55			no-map;
     56		};
     57
     58		retram: retram@38000000 {
     59			compatible = "shared-dma-pool";
     60			reg = <0x38000000 0x10000>;
     61			no-map;
     62		};
     63	};
     64};
     65
     66&crc1 {
     67	status = "okay";
     68};
     69
     70&dts {
     71	status = "okay";
     72};
     73
     74&i2c4 {
     75	pinctrl-names = "default";
     76	pinctrl-0 = <&i2c4_pins_a>;
     77	i2c-scl-rising-time-ns = <185>;
     78	i2c-scl-falling-time-ns = <20>;
     79	status = "okay";
     80	/delete-property/dmas;
     81	/delete-property/dma-names;
     82
     83	pmic: stpmic@33 {
     84		compatible = "st,stpmic1";
     85		reg = <0x33>;
     86		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
     87		interrupt-controller;
     88		#interrupt-cells = <2>;
     89		status = "okay";
     90
     91		regulators {
     92			compatible = "st,stpmic1-regulators";
     93
     94			ldo1-supply = <&v3v3>;
     95			ldo2-supply = <&v3v3>;
     96			ldo3-supply = <&vdd_ddr>;
     97			ldo5-supply = <&v3v3>;
     98			ldo6-supply = <&v3v3>;
     99			pwr_sw1-supply = <&bst_out>;
    100			pwr_sw2-supply = <&bst_out>;
    101
    102			vddcore: buck1 {
    103				regulator-name = "vddcore";
    104				regulator-min-microvolt = <1200000>;
    105				regulator-max-microvolt = <1350000>;
    106				regulator-always-on;
    107				regulator-initial-mode = <0>;
    108				regulator-over-current-protection;
    109			};
    110
    111			vdd_ddr: buck2 {
    112				regulator-name = "vdd_ddr";
    113				regulator-min-microvolt = <1350000>;
    114				regulator-max-microvolt = <1350000>;
    115				regulator-always-on;
    116				regulator-initial-mode = <0>;
    117				regulator-over-current-protection;
    118			};
    119
    120			vdd: buck3 {
    121				regulator-name = "vdd";
    122				regulator-min-microvolt = <2900000>;
    123				regulator-max-microvolt = <2900000>;
    124				regulator-always-on;
    125				regulator-initial-mode = <0>;
    126				regulator-over-current-protection;
    127			};
    128
    129			v3v3: buck4 {
    130				regulator-name = "v3v3";
    131				regulator-min-microvolt = <3300000>;
    132				regulator-max-microvolt = <3300000>;
    133				regulator-always-on;
    134				regulator-over-current-protection;
    135				regulator-initial-mode = <0>;
    136			};
    137
    138			vdda: ldo1 {
    139				regulator-name = "vdda";
    140				regulator-min-microvolt = <2900000>;
    141				regulator-max-microvolt = <2900000>;
    142				interrupts = <IT_CURLIM_LDO1 0>;
    143			};
    144
    145			v2v8: ldo2 {
    146				regulator-name = "v2v8";
    147				regulator-min-microvolt = <2800000>;
    148				regulator-max-microvolt = <2800000>;
    149				interrupts = <IT_CURLIM_LDO2 0>;
    150			};
    151
    152			vtt_ddr: ldo3 {
    153				regulator-name = "vtt_ddr";
    154				regulator-min-microvolt = <500000>;
    155				regulator-max-microvolt = <750000>;
    156				regulator-always-on;
    157				regulator-over-current-protection;
    158			};
    159
    160			vdd_usb: ldo4 {
    161				regulator-name = "vdd_usb";
    162				interrupts = <IT_CURLIM_LDO4 0>;
    163			};
    164
    165			vdd_sd: ldo5 {
    166				regulator-name = "vdd_sd";
    167				regulator-min-microvolt = <2900000>;
    168				regulator-max-microvolt = <2900000>;
    169				interrupts = <IT_CURLIM_LDO5 0>;
    170				regulator-boot-on;
    171			};
    172
    173			v1v8: ldo6 {
    174				regulator-name = "v1v8";
    175				regulator-min-microvolt = <1800000>;
    176				regulator-max-microvolt = <1800000>;
    177				interrupts = <IT_CURLIM_LDO6 0>;
    178				regulator-enable-ramp-delay = <300000>;
    179			};
    180
    181			vref_ddr: vref_ddr {
    182				regulator-name = "vref_ddr";
    183				regulator-always-on;
    184			};
    185
    186			bst_out: boost {
    187				regulator-name = "bst_out";
    188				interrupts = <IT_OCP_BOOST 0>;
    189			};
    190
    191			vbus_otg: pwr_sw1 {
    192				regulator-name = "vbus_otg";
    193				interrupts = <IT_OCP_OTG 0>;
    194				regulator-active-discharge = <1>;
    195			};
    196
    197			vbus_sw: pwr_sw2 {
    198				regulator-name = "vbus_sw";
    199				interrupts = <IT_OCP_SWOUT 0>;
    200				regulator-active-discharge = <1>;
    201			};
    202		};
    203
    204		onkey {
    205			compatible = "st,stpmic1-onkey";
    206			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
    207			interrupt-names = "onkey-falling", "onkey-rising";
    208			status = "okay";
    209		};
    210
    211		watchdog {
    212			compatible = "st,stpmic1-wdt";
    213			status = "disabled";
    214		};
    215	};
    216
    217	eeprom@53 {
    218		compatible = "atmel,24c02";
    219		reg = <0x53>;
    220		pagesize = <16>;
    221	};
    222};
    223
    224&ipcc {
    225	status = "okay";
    226};
    227
    228&iwdg2 {
    229	timeout-sec = <32>;
    230	status = "okay";
    231};
    232
    233&m4_rproc {
    234	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
    235			<&vdev0vring1>, <&vdev0buffer>;
    236	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
    237	mbox-names = "vq0", "vq1", "shutdown";
    238	interrupt-parent = <&exti>;
    239	interrupts = <68 1>;
    240	status = "okay";
    241};
    242
    243&pwr_regulators {
    244	vdd-supply = <&vdd>;
    245	vdd_3v3_usbfs-supply = <&vdd_usb>;
    246};
    247
    248&qspi {
    249	pinctrl-names = "default", "sleep";
    250	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
    251	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
    252	reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
    253	#address-cells = <1>;
    254	#size-cells = <0>;
    255	status = "okay";
    256
    257	flash0: flash@0 {
    258		compatible = "jedec,spi-nor";
    259		reg = <0>;
    260		spi-rx-bus-width = <4>;
    261		spi-max-frequency = <50000000>;
    262		#address-cells = <1>;
    263		#size-cells = <1>;
    264	};
    265};
    266
    267&rng1 {
    268	status = "okay";
    269};
    270
    271&rtc {
    272	status = "okay";
    273};