cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun4i-a10-marsboard.dts (3832B)

      1/*
      2 * Copyright 2015 Aleksei Mamlin
      3 * Aleksei Mamlin <mamlinav@gmail.com>
      4 *
      5 * This file is dual-licensed: you can use it either under the terms
      6 * of the GPL or the X11 license, at your option. Note that this dual
      7 * licensing only applies to this file, and not this project as a
      8 * whole.
      9 *
     10 *  a) This file is free software; you can redistribute it and/or
     11 *     modify it under the terms of the GNU General Public License as
     12 *     published by the Free Software Foundation; either version 2 of the
     13 *     License, or (at your option) any later version.
     14 *
     15 *     This file is distributed in the hope that it will be useful,
     16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18 *     GNU General Public License for more details.
     19 *
     20 * Or, alternatively,
     21 *
     22 *  b) Permission is hereby granted, free of charge, to any person
     23 *     obtaining a copy of this software and associated documentation
     24 *     files (the "Software"), to deal in the Software without
     25 *     restriction, including without limitation the rights to use,
     26 *     copy, modify, merge, publish, distribute, sublicense, and/or
     27 *     sell copies of the Software, and to permit persons to whom the
     28 *     Software is furnished to do so, subject to the following
     29 *     conditions:
     30 *
     31 *     The above copyright notice and this permission notice shall be
     32 *     included in all copies or substantial portions of the Software.
     33 *
     34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     41 *     OTHER DEALINGS IN THE SOFTWARE.
     42 */
     43
     44/dts-v1/;
     45#include "sun4i-a10.dtsi"
     46#include "sunxi-common-regulators.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49
     50/ {
     51	model = "HAOYU Electronics Marsboard A10";
     52	compatible = "haoyu,a10-marsboard", "allwinner,sun4i-a10";
     53
     54	aliases {
     55		serial0 = &uart0;
     56	};
     57
     58	chosen {
     59		stdout-path = "serial0:115200n8";
     60	};
     61
     62	leds {
     63		compatible = "gpio-leds";
     64
     65		led-0 {
     66			label = "marsboard:red1:usr";
     67			gpios = <&pio 1 5 GPIO_ACTIVE_HIGH>;
     68		};
     69
     70		led-1 {
     71			label = "marsboard:red2:usr";
     72			gpios = <&pio 1 6 GPIO_ACTIVE_HIGH>;
     73		};
     74
     75		led-2 {
     76			label = "marsboard:red3:usr";
     77			gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>;
     78		};
     79
     80		led-3 {
     81			label = "marsboard:red4:usr";
     82			gpios = <&pio 1 8 GPIO_ACTIVE_HIGH>;
     83		};
     84	};
     85};
     86
     87&ahci {
     88	status = "okay";
     89};
     90
     91&codec {
     92	status = "okay";
     93};
     94
     95&ehci0 {
     96	status = "okay";
     97};
     98
     99&ehci1 {
    100	status = "okay";
    101};
    102
    103&emac_sram {
    104	status = "okay";
    105};
    106
    107&emac {
    108	phy-handle = <&phy1>;
    109	status = "okay";
    110};
    111
    112&i2c0 {
    113	status = "okay";
    114};
    115
    116&i2c1 {
    117	status = "okay";
    118};
    119
    120&i2c2 {
    121	status = "okay";
    122};
    123
    124&mdio {
    125	status = "okay";
    126
    127	phy1: ethernet-phy@1 {
    128		reg = <1>;
    129	};
    130};
    131
    132&mmc0 {
    133	vmmc-supply = <&reg_vcc3v3>;
    134	bus-width = <4>;
    135	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
    136	status = "okay";
    137};
    138
    139&ohci0 {
    140	status = "okay";
    141};
    142
    143&ohci1 {
    144	status = "okay";
    145};
    146
    147&otg_sram {
    148	status = "okay";
    149};
    150
    151&reg_usb1_vbus {
    152	status = "okay";
    153};
    154
    155&reg_usb2_vbus {
    156	status = "okay";
    157};
    158
    159&spi0 {
    160	pinctrl-names = "default";
    161	pinctrl-0 = <&spi0_pi_pins>,
    162		    <&spi0_cs0_pi_pin>;
    163	status = "okay";
    164};
    165
    166&uart0 {
    167	pinctrl-names = "default";
    168	pinctrl-0 = <&uart0_pb_pins>;
    169	status = "okay";
    170};
    171
    172&usb_otg {
    173	dr_mode = "otg";
    174	status = "okay";
    175};
    176
    177&usbphy {
    178	usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */
    179	usb1_vbus-supply = <&reg_usb1_vbus>;
    180	usb2_vbus-supply = <&reg_usb2_vbus>;
    181	status = "okay";
    182};