cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun5i-a13-olinuxino-micro.dts (3592B)

      1/*
      2 * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
      3 * Copyright 2013 Hans de Goede <hdegoede@redhat.com>
      4 *
      5 * This file is dual-licensed: you can use it either under the terms
      6 * of the GPL or the X11 license, at your option. Note that this dual
      7 * licensing only applies to this file, and not this project as a
      8 * whole.
      9 *
     10 *  a) This file is free software; you can redistribute it and/or
     11 *     modify it under the terms of the GNU General Public License as
     12 *     published by the Free Software Foundation; either version 2 of the
     13 *     License, or (at your option) any later version.
     14 *
     15 *     This file is distributed in the hope that it will be useful,
     16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18 *     GNU General Public License for more details.
     19 *
     20 * Or, alternatively,
     21 *
     22 *  b) Permission is hereby granted, free of charge, to any person
     23 *     obtaining a copy of this software and associated documentation
     24 *     files (the "Software"), to deal in the Software without
     25 *     restriction, including without limitation the rights to use,
     26 *     copy, modify, merge, publish, distribute, sublicense, and/or
     27 *     sell copies of the Software, and to permit persons to whom the
     28 *     Software is furnished to do so, subject to the following
     29 *     conditions:
     30 *
     31 *     The above copyright notice and this permission notice shall be
     32 *     included in all copies or substantial portions of the Software.
     33 *
     34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     41 *     OTHER DEALINGS IN THE SOFTWARE.
     42 */
     43
     44/dts-v1/;
     45#include "sun5i-a13.dtsi"
     46#include "sunxi-common-regulators.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49
     50/ {
     51	model = "Olimex A13-Olinuxino Micro";
     52	compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13";
     53
     54	aliases {
     55		serial0 = &uart1;
     56	};
     57
     58	chosen {
     59		stdout-path = "serial0:115200n8";
     60	};
     61
     62	leds {
     63		compatible = "gpio-leds";
     64		pinctrl-names = "default";
     65		pinctrl-0 = <&led_pins_olinuxinom>;
     66
     67		led {
     68			label = "a13-olinuxino-micro:green:power";
     69			gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>;
     70			default-state = "on";
     71		};
     72	};
     73};
     74
     75&ehci0 {
     76	status = "okay";
     77};
     78
     79&i2c0 {
     80	status = "okay";
     81};
     82
     83&i2c1 {
     84	status = "okay";
     85};
     86
     87&i2c2 {
     88	status = "okay";
     89};
     90
     91&mmc0 {
     92	vmmc-supply = <&reg_vcc3v3>;
     93	bus-width = <4>;
     94	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
     95	status = "okay";
     96};
     97
     98&ohci0 {
     99	status = "okay";
    100};
    101
    102&otg_sram {
    103	status = "okay";
    104};
    105
    106&pio {
    107	led_pins_olinuxinom: led-pin {
    108		pins = "PG9";
    109		function = "gpio_out";
    110		drive-strength = <20>;
    111	};
    112};
    113
    114&reg_usb0_vbus {
    115	gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>;
    116	status = "okay";
    117};
    118
    119&reg_usb1_vbus {
    120	gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
    121	status = "okay";
    122};
    123
    124&uart1 {
    125	pinctrl-names = "default";
    126	pinctrl-0 = <&uart1_pg_pins>;
    127	status = "okay";
    128};
    129
    130&usb_otg {
    131	dr_mode = "otg";
    132	status = "okay";
    133};
    134
    135&usbphy {
    136	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
    137	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
    138	usb0_vbus-supply = <&reg_usb0_vbus>;
    139	usb1_vbus-supply = <&reg_usb1_vbus>;
    140	status = "okay";
    141};