cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun5i-a13-utoo-p66.dts (3664B)


      1/*
      2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43/dts-v1/;
     44#include "sun5i-a13.dtsi"
     45#include "sun5i-reference-design-tablet.dtsi"
     46#include <dt-bindings/interrupt-controller/irq.h>
     47
     48/ {
     49	model = "Utoo P66";
     50	compatible = "utoo,p66", "allwinner,sun5i-a13";
     51
     52	/* The P66 uses the uart pins as gpios */
     53	aliases {
     54		/delete-property/serial0;
     55	};
     56
     57	chosen {
     58		/delete-property/stdout-path;
     59	};
     60
     61	i2c_lcd: i2c {
     62		/* The lcd panel i2c interface is hooked up via gpios */
     63		compatible = "i2c-gpio";
     64		sda-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */
     65		scl-gpios = <&pio 6 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG10 */
     66		i2c-gpio,delay-us = <5>;
     67	};
     68};
     69
     70&backlight {
     71	/* Note levels of 10 / 20% result in backlight off */
     72	brightness-levels = <0 30 40 50 60 70 80 90 100>;
     73	default-brightness-level = <6>;
     74};
     75
     76&codec {
     77	allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */
     78};
     79
     80&mmc2 {
     81	pinctrl-names = "default";
     82	pinctrl-0 = <&mmc2_8bit_pins>;
     83	vmmc-supply = <&reg_vcc3v3>;
     84	bus-width = <8>;
     85	non-removable;
     86	status = "okay";
     87
     88	mmccard: mmccard@0 {
     89		reg = <0>;
     90		compatible = "mmc-card";
     91		broken-hpi;
     92	};
     93};
     94
     95&reg_usb0_vbus {
     96	gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
     97};
     98
     99&touchscreen {
    100	compatible = "chipone,icn8318";
    101	reg = <0x40>;
    102	/* The P66 uses a different EINT then the reference design */
    103	interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
    104	/* The icn8318 binding expects wake-gpios instead of power-gpios */
    105	wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
    106	touchscreen-size-x = <800>;
    107	touchscreen-size-y = <480>;
    108	touchscreen-inverted-x;
    109	touchscreen-swapped-x-y;
    110	status = "okay";
    111};
    112
    113&uart1 {
    114	/* The P66 uses the uart pins as gpios */
    115	status = "disabled";
    116};