cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun5i-gr8-chip-pro.dts (5509B)


      1/*
      2 * Copyright 2016 Free Electrons
      3 * Copyright 2016 NextThing Co
      4 *
      5 * Maxime Ripard <maxime.ripard@free-electrons.com>
      6 *
      7 * This file is dual-licensed: you can use it either under the terms
      8 * of the GPL or the X11 license, at your option. Note that this dual
      9 * licensing only applies to this file, and not this project as a
     10 * whole.
     11 *
     12 *  a) This file is free software; you can redistribute it and/or
     13 *     modify it under the terms of the GNU General Public License as
     14 *     published by the Free Software Foundation; either version 2 of the
     15 *     License, or (at your option) any later version.
     16 *
     17 *     This file is distributed in the hope that it will be useful,
     18 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     19 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     20 *     GNU General Public License for more details.
     21 *
     22 * Or, alternatively,
     23 *
     24 *  b) Permission is hereby granted, free of charge, to any person
     25 *     obtaining a copy of this software and associated documentation
     26 *     files (the "Software"), to deal in the Software without
     27 *     restriction, including without limitation the rights to use,
     28 *     copy, modify, merge, publish, distribute, sublicense, and/or
     29 *     sell copies of the Software, and to permit persons to whom the
     30 *     Software is furnished to do so, subject to the following
     31 *     conditions:
     32 *
     33 *     The above copyright notice and this permission notice shall be
     34 *     included in all copies or substantial portions of the Software.
     35 *
     36 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     37 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     38 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     39 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     40 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     41 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     42 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     43 *     OTHER DEALINGS IN THE SOFTWARE.
     44 */
     45
     46/dts-v1/;
     47#include "sun5i-gr8.dtsi"
     48#include "sunxi-common-regulators.dtsi"
     49
     50#include <dt-bindings/gpio/gpio.h>
     51#include <dt-bindings/input/input.h>
     52#include <dt-bindings/interrupt-controller/irq.h>
     53
     54/ {
     55	model = "NextThing C.H.I.P. Pro";
     56	compatible = "nextthing,chip-pro", "nextthing,gr8";
     57
     58	aliases {
     59		i2c0 = &i2c0;
     60		i2c1 = &i2c1;
     61		serial0 = &uart1;
     62		serial1 = &uart2;
     63		serial2 = &uart3;
     64	};
     65
     66	chosen {
     67		stdout-path = "serial0:115200n8";
     68	};
     69
     70	leds {
     71		compatible = "gpio-leds";
     72
     73		status {
     74			label = "chip-pro:white:status";
     75			gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
     76			default-state = "on";
     77		};
     78	};
     79
     80	mmc0_pwrseq: mmc0_pwrseq {
     81		compatible = "mmc-pwrseq-simple";
     82		reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
     83	};
     84};
     85
     86&codec {
     87	status = "okay";
     88};
     89
     90&ehci0 {
     91	status = "okay";
     92};
     93
     94&i2c0 {
     95	status = "okay";
     96
     97	axp209: pmic@34 {
     98		reg = <0x34>;
     99
    100		/*
    101		* The interrupt is routed through the "External Fast
    102		* Interrupt Request" pin (ball G13 of the module)
    103		* directly to the main interrupt controller, without
    104		* any other controller interfering.
    105		*/
    106		interrupts = <0>;
    107	};
    108};
    109
    110#include "axp209.dtsi"
    111
    112&i2c1 {
    113	status = "disabled";
    114};
    115
    116&i2s0 {
    117	pinctrl-names = "default";
    118	pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>;
    119	status = "disabled";
    120};
    121
    122&mmc0 {
    123	vmmc-supply = <&reg_vcc3v3>;
    124	mmc-pwrseq = <&mmc0_pwrseq>;
    125	bus-width = <4>;
    126	non-removable;
    127	status = "okay";
    128};
    129
    130&nfc {
    131	pinctrl-names = "default";
    132	pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
    133	status = "okay";
    134
    135	nand@0 {
    136		reg = <0>;
    137		allwinner,rb = <0>;
    138		nand-ecc-mode = "hw";
    139	};
    140};
    141
    142&ohci0 {
    143	status = "okay";
    144};
    145
    146&otg_sram {
    147	status = "okay";
    148};
    149
    150&pwm {
    151	pinctrl-names = "default";
    152	pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>;
    153	status = "disabled";
    154};
    155
    156&reg_dcdc2 {
    157	regulator-min-microvolt = <1000000>;
    158	regulator-max-microvolt = <1400000>;
    159	regulator-name = "vdd-cpu";
    160	regulator-always-on;
    161};
    162
    163&reg_dcdc3 {
    164	regulator-min-microvolt = <1000000>;
    165	regulator-max-microvolt = <1300000>;
    166	regulator-name = "vdd-sys";
    167	regulator-always-on;
    168};
    169
    170&reg_ldo1 {
    171	regulator-name = "vdd-rtc";
    172};
    173
    174&reg_ldo2 {
    175	regulator-min-microvolt = <2700000>;
    176	regulator-max-microvolt = <3300000>;
    177	regulator-name = "avcc";
    178	regulator-always-on;
    179};
    180
    181/*
    182 * Both LDO3 and LDO4 are used in parallel to power up the
    183 * WiFi/BT chip.
    184 */
    185&reg_ldo3 {
    186	regulator-min-microvolt = <3300000>;
    187	regulator-max-microvolt = <3300000>;
    188	regulator-name = "vcc-wifi-1";
    189	regulator-always-on;
    190};
    191
    192&reg_ldo4 {
    193	regulator-min-microvolt = <3300000>;
    194	regulator-max-microvolt = <3300000>;
    195	regulator-name = "vcc-wifi-2";
    196	regulator-always-on;
    197};
    198
    199&uart1 {
    200	pinctrl-names = "default";
    201	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>;
    202	status = "okay";
    203};
    204
    205&uart2 {
    206	pinctrl-names = "default";
    207	pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>;
    208	status = "disabled";
    209};
    210
    211&uart3 {
    212	pinctrl-names = "default";
    213	pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
    214	status = "okay";
    215};
    216
    217&usb_otg {
    218	/*
    219	 * The CHIP Pro doesn't have a controllable VBUS, nor does it
    220	 * have any 5v rail on the board itself.
    221	 *
    222	 * If one wants to use it as a true OTG port, it should be
    223	 * done in the baseboard, and its DT / overlay will add it.
    224	 */
    225	dr_mode = "otg";
    226	status = "okay";
    227};
    228
    229&usb_power_supply {
    230	status = "okay";
    231};
    232
    233&usbphy {
    234	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
    235	usb0_vbus_power-supply = <&usb_power_supply>;
    236	usb1_vbus-supply = <&reg_vcc5v0>;
    237	status = "okay";
    238};