cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun5i-r8-chip.dts (5915B)


      1/*
      2 * Copyright 2015 Free Electrons
      3 * Copyright 2015 NextThing Co
      4 *
      5 * Maxime Ripard <maxime.ripard@free-electrons.com>
      6 *
      7 * This file is dual-licensed: you can use it either under the terms
      8 * of the GPL or the X11 license, at your option. Note that this dual
      9 * licensing only applies to this file, and not this project as a
     10 * whole.
     11 *
     12 *  a) This file is free software; you can redistribute it and/or
     13 *     modify it under the terms of the GNU General Public License as
     14 *     published by the Free Software Foundation; either version 2 of the
     15 *     License, or (at your option) any later version.
     16 *
     17 *     This file is distributed in the hope that it will be useful,
     18 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     19 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     20 *     GNU General Public License for more details.
     21 *
     22 * Or, alternatively,
     23 *
     24 *  b) Permission is hereby granted, free of charge, to any person
     25 *     obtaining a copy of this software and associated documentation
     26 *     files (the "Software"), to deal in the Software without
     27 *     restriction, including without limitation the rights to use,
     28 *     copy, modify, merge, publish, distribute, sublicense, and/or
     29 *     sell copies of the Software, and to permit persons to whom the
     30 *     Software is furnished to do so, subject to the following
     31 *     conditions:
     32 *
     33 *     The above copyright notice and this permission notice shall be
     34 *     included in all copies or substantial portions of the Software.
     35 *
     36 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     37 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     38 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     39 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     40 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     41 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     42 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     43 *     OTHER DEALINGS IN THE SOFTWARE.
     44 */
     45
     46/dts-v1/;
     47#include "sun5i-r8.dtsi"
     48#include "sunxi-common-regulators.dtsi"
     49
     50#include <dt-bindings/gpio/gpio.h>
     51#include <dt-bindings/interrupt-controller/irq.h>
     52
     53/ {
     54	model = "NextThing C.H.I.P.";
     55	compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";
     56
     57	aliases {
     58		i2c0 = &i2c0;
     59		i2c1 = &i2c1;
     60		i2c2 = &i2c2;
     61		serial0 = &uart1;
     62		serial1 = &uart3;
     63		spi0 = &spi2;
     64	};
     65
     66	chosen {
     67		stdout-path = "serial0:115200n8";
     68	};
     69
     70	leds {
     71		compatible = "gpio-leds";
     72
     73		status {
     74			label = "chip:white:status";
     75			gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>;
     76			default-state = "on";
     77		};
     78	};
     79
     80	mmc0_pwrseq: mmc0_pwrseq {
     81		compatible = "mmc-pwrseq-simple";
     82		reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
     83	};
     84
     85	onewire {
     86		compatible = "w1-gpio";
     87		gpios = <&pio 3 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PD2 */
     88	};
     89};
     90
     91&be0 {
     92	status = "okay";
     93};
     94
     95&codec {
     96	status = "okay";
     97};
     98
     99&cpu0 {
    100	cpu-supply = <&reg_dcdc2>;
    101};
    102
    103&ehci0 {
    104	status = "okay";
    105};
    106
    107&i2c0 {
    108	status = "okay";
    109
    110	axp209: pmic@34 {
    111		reg = <0x34>;
    112
    113		/*
    114		 * The interrupt is routed through the "External Fast
    115		 * Interrupt Request" pin (ball G13 of the module)
    116		 * directly to the main interrupt controller, without
    117		 * any other controller interfering.
    118		 */
    119		interrupts = <0>;
    120	};
    121};
    122
    123#include "axp209.dtsi"
    124
    125&ac_power_supply {
    126	status = "okay";
    127};
    128
    129&battery_power_supply {
    130	status = "okay";
    131};
    132
    133&i2c1 {
    134	status = "disabled";
    135};
    136
    137&i2c2 {
    138	status = "okay";
    139
    140	xio: gpio@38 {
    141		compatible = "nxp,pcf8574a";
    142		reg = <0x38>;
    143
    144		gpio-controller;
    145		#gpio-cells = <2>;
    146
    147		interrupt-parent = <&pio>;
    148		interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>;
    149		interrupt-controller;
    150		#interrupt-cells = <2>;
    151	};
    152};
    153
    154&mmc0_pins {
    155	bias-pull-up;
    156};
    157
    158&mmc0 {
    159	vmmc-supply = <&reg_vcc3v3>;
    160	mmc-pwrseq = <&mmc0_pwrseq>;
    161	bus-width = <4>;
    162	non-removable;
    163	status = "okay";
    164};
    165
    166&ohci0 {
    167	status = "okay";
    168};
    169
    170&otg_sram {
    171	status = "okay";
    172};
    173
    174&reg_dcdc2 {
    175	regulator-min-microvolt = <1000000>;
    176	regulator-max-microvolt = <1400000>;
    177	regulator-name = "cpuvdd";
    178	regulator-always-on;
    179};
    180
    181&reg_dcdc3 {
    182	regulator-min-microvolt = <1000000>;
    183	regulator-max-microvolt = <1300000>;
    184	regulator-name = "corevdd";
    185	regulator-always-on;
    186};
    187
    188&reg_ldo1 {
    189	regulator-name = "rtcvdd";
    190};
    191
    192&reg_ldo2 {
    193	regulator-min-microvolt = <2700000>;
    194	regulator-max-microvolt = <3300000>;
    195	regulator-name = "avcc";
    196	regulator-always-on;
    197};
    198
    199/*
    200 * Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT
    201 * Chip.
    202 *
    203 * If those are not enabled, the SDIO part will not enumerate, and
    204 * since there's no way currently to pass DT infos to an SDIO device,
    205 * we cannot really do better than this ugly hack for now.
    206 */
    207&reg_ldo3 {
    208	regulator-min-microvolt = <3300000>;
    209	regulator-max-microvolt = <3300000>;
    210	regulator-name = "vcc-wifi-1";
    211	regulator-always-on;
    212};
    213
    214&reg_ldo4 {
    215	regulator-min-microvolt = <3300000>;
    216	regulator-max-microvolt = <3300000>;
    217	regulator-name = "vcc-wifi-2";
    218	regulator-always-on;
    219};
    220
    221&reg_ldo5 {
    222	regulator-min-microvolt = <1800000>;
    223	regulator-max-microvolt = <1800000>;
    224	regulator-name = "vcc-1v8";
    225};
    226
    227&reg_usb0_vbus {
    228	vin-supply = <&reg_vcc5v0>;
    229	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
    230	status = "okay";
    231};
    232
    233&spi2 {
    234	pinctrl-names = "default";
    235	pinctrl-0 = <&spi2_pe_pins>;
    236	status = "disabled";
    237};
    238
    239&tcon0 {
    240	status = "okay";
    241};
    242
    243&tve0 {
    244	status = "okay";
    245};
    246
    247&uart1 {
    248	pinctrl-names = "default";
    249	pinctrl-0 = <&uart1_pg_pins>;
    250	status = "okay";
    251};
    252
    253&uart3 {
    254	pinctrl-names = "default";
    255	pinctrl-0 = <&uart3_pg_pins>,
    256		    <&uart3_cts_rts_pg_pins>;
    257	status = "okay";
    258};
    259
    260&usb_otg {
    261	dr_mode = "otg";
    262	status = "okay";
    263};
    264
    265&usb_power_supply {
    266	status = "okay";
    267};
    268
    269&usbphy {
    270	status = "okay";
    271
    272	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
    273	usb0_vbus_power-supply = <&usb_power_supply>;
    274	usb0_vbus-supply = <&reg_usb0_vbus>;
    275	usb1_vbus-supply = <&reg_vcc5v0>;
    276};