cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun5i-reference-design-tablet.dtsi (4888B)


      1/*
      2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42#include "sunxi-reference-design-tablet.dtsi"
     43
     44#include <dt-bindings/interrupt-controller/irq.h>
     45#include <dt-bindings/pwm/pwm.h>
     46
     47/ {
     48	aliases {
     49		serial0 = &uart1;
     50	};
     51
     52	backlight: backlight {
     53		compatible = "pwm-backlight";
     54		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
     55		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
     56		default-brightness-level = <8>;
     57		enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; /* AXP GPIO1 */
     58		power-supply = <&reg_vcc3v0>;
     59	};
     60
     61	chosen {
     62		stdout-path = "serial0:115200n8";
     63	};
     64};
     65
     66&codec {
     67	allwinner,pa-gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */
     68	status = "okay";
     69};
     70
     71&cpu0 {
     72	cpu-supply = <&reg_dcdc2>;
     73};
     74
     75&ehci0 {
     76	status = "okay";
     77};
     78
     79&i2c0 {
     80	axp209: pmic@34 {
     81		reg = <0x34>;
     82		interrupts = <0>;
     83	};
     84};
     85
     86&i2c1 {
     87	/*
     88	 * The gsl1680 is rated at 400KHz and it will not work reliable at
     89	 * 100KHz, this has been confirmed on multiple different q8 tablets.
     90	 * All other devices on this bus are also rated for 400KHz.
     91	 */
     92	clock-frequency = <400000>;
     93
     94	touchscreen: touchscreen@40 {
     95		reg = <0x40>;
     96		interrupt-parent = <&pio>;
     97		interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
     98		power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
     99		/* Tablet dts must provide reg and compatible */
    100		status = "disabled";
    101	};
    102
    103	pcf8563: rtc@51 {
    104		compatible = "nxp,pcf8563";
    105		reg = <0x51>;
    106	};
    107};
    108
    109#include "axp209.dtsi"
    110
    111&ac_power_supply {
    112	status = "okay";
    113};
    114
    115&battery_power_supply {
    116	status = "okay";
    117};
    118
    119&lradc {
    120	vref-supply = <&reg_ldo2>;
    121};
    122
    123&mmc0 {
    124	pinctrl-names = "default";
    125	pinctrl-0 = <&mmc0_pins>;
    126	vmmc-supply = <&reg_vcc3v0>;
    127	bus-width = <4>;
    128	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
    129	status = "okay";
    130};
    131
    132&otg_sram {
    133	status = "okay";
    134};
    135
    136&reg_dcdc2 {
    137	regulator-always-on;
    138	regulator-min-microvolt = <1000000>;
    139	regulator-max-microvolt = <1500000>;
    140	regulator-name = "vdd-cpu";
    141};
    142
    143&reg_dcdc3 {
    144	regulator-always-on;
    145	regulator-min-microvolt = <1000000>;
    146	regulator-max-microvolt = <1400000>;
    147	regulator-name = "vdd-int-pll";
    148};
    149
    150&reg_ldo1 {
    151	regulator-name = "vdd-rtc";
    152};
    153
    154&reg_ldo2 {
    155	regulator-always-on;
    156	regulator-min-microvolt = <3000000>;
    157	regulator-max-microvolt = <3000000>;
    158	regulator-name = "avcc";
    159};
    160
    161&reg_ldo3 {
    162	regulator-min-microvolt = <3300000>;
    163	regulator-max-microvolt = <3300000>;
    164	regulator-name = "vcc-wifi";
    165};
    166
    167&reg_usb0_vbus {
    168	gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
    169	status = "okay";
    170};
    171
    172&uart1 {
    173	pinctrl-names = "default";
    174	pinctrl-0 = <&uart1_pg_pins>;
    175	status = "okay";
    176};
    177
    178&usb_otg {
    179	dr_mode = "otg";
    180	status = "okay";
    181};
    182
    183&usb_power_supply {
    184	status = "okay";
    185};
    186
    187&usbphy {
    188	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
    189	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
    190	usb0_vbus_power-supply = <&usb_power_supply>;
    191	usb0_vbus-supply = <&reg_usb0_vbus>;
    192	usb1_vbus-supply = <&reg_ldo3>;
    193	status = "okay";
    194};