cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun6i-a31-colombus.dts (3438B)


      1/*
      2 * Copyright 2013 Maxime Ripard
      3 *
      4 * Maxime Ripard <maxime.ripard@free-electrons.com>
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This file is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This file is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 * Or, alternatively,
     22 *
     23 *  b) Permission is hereby granted, free of charge, to any person
     24 *     obtaining a copy of this software and associated documentation
     25 *     files (the "Software"), to deal in the Software without
     26 *     restriction, including without limitation the rights to use,
     27 *     copy, modify, merge, publish, distribute, sublicense, and/or
     28 *     sell copies of the Software, and to permit persons to whom the
     29 *     Software is furnished to do so, subject to the following
     30 *     conditions:
     31 *
     32 *     The above copyright notice and this permission notice shall be
     33 *     included in all copies or substantial portions of the Software.
     34 *
     35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42 *     OTHER DEALINGS IN THE SOFTWARE.
     43 */
     44
     45/dts-v1/;
     46#include "sun6i-a31.dtsi"
     47#include "sunxi-common-regulators.dtsi"
     48
     49#include <dt-bindings/gpio/gpio.h>
     50
     51/ {
     52	model = "WITS A31 Colombus Evaluation Board";
     53	compatible = "wits,colombus", "allwinner,sun6i-a31";
     54
     55	aliases {
     56		serial0 = &uart0;
     57	};
     58
     59	chosen {
     60		stdout-path = "serial0:115200n8";
     61	};
     62
     63	i2c_lcd: i2c {
     64		/* The lcd panel i2c interface is hooked up via gpios */
     65		compatible = "i2c-gpio";
     66		sda-gpios = <&pio 0 23 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PA23 */
     67		scl-gpios = <&pio 0 24 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PA24 */
     68		i2c-gpio,delay-us = <5>;
     69	};
     70};
     71
     72&ehci1 {
     73	status = "okay";
     74};
     75
     76&gmac {
     77	pinctrl-names = "default";
     78	pinctrl-0 = <&gmac_rgmii_pins>;
     79	phy-handle = <&phy1>;
     80	phy-mode = "rgmii";
     81	status = "okay";
     82};
     83
     84&i2c0 {
     85	status = "fail";
     86};
     87
     88&i2c1 {
     89	status = "okay";
     90};
     91
     92&i2c2 {
     93	status = "okay";
     94
     95	mma8452: mma8452@1d {
     96		compatible = "fsl,mma8452";
     97		reg = <0x1d>;
     98		interrupt-parent = <&pio>;
     99		interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PA9 */
    100	};
    101};
    102
    103&mdio {
    104	phy1: ethernet-phy@1 {
    105		reg = <1>;
    106	};
    107};
    108
    109&mmc0 {
    110	vmmc-supply = <&reg_vcc3v0>;
    111	bus-width = <4>;
    112	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
    113	status = "okay";
    114};
    115
    116&reg_usb2_vbus {
    117	gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>;
    118	status = "okay";
    119};
    120
    121&uart0 {
    122	pinctrl-names = "default";
    123	pinctrl-0 = <&uart0_ph_pins>;
    124	status = "okay";
    125};
    126
    127&usbphy {
    128	usb2_vbus-supply = <&reg_usb2_vbus>;
    129	status = "okay";
    130};