cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun6i-a31s-sina31s-core.dtsi (3846B)

      1/*
      2 * Copyright 2015 Chen-Yu Tsai <wens@csie.org>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43/dts-v1/;
     44#include "sun6i-a31s.dtsi"
     45#include "sunxi-common-regulators.dtsi"
     46
     47#include <dt-bindings/gpio/gpio.h>
     48
     49/ {
     50	model = "Sinlinx SinA31s Core Board";
     51	compatible = "sinlinx,sina31s", "allwinner,sun6i-a31s";
     52
     53	aliases {
     54		serial0 = &uart0;
     55	};
     56};
     57
     58&cpu0 {
     59	cpu-supply = <&reg_dcdc3>;
     60};
     61
     62/* eMMC on core board */
     63&mmc3 {
     64	pinctrl-names = "default";
     65	pinctrl-0 = <&mmc3_8bit_emmc_pins>;
     66	vmmc-supply = <&reg_dcdc1>;
     67	vqmmc-supply = <&reg_dcdc1>;
     68	bus-width = <8>;
     69	non-removable;
     70	cap-mmc-hw-reset;
     71	status = "okay";
     72};
     73
     74/* AXP221s PMIC on core board */
     75&p2wi {
     76	status = "okay";
     77
     78	axp22x: pmic@68 {
     79		compatible = "x-powers,axp221";
     80		reg = <0x68>;
     81		interrupt-parent = <&r_intc>;
     82		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
     83	};
     84};
     85
     86#include "axp22x.dtsi"
     87
     88&reg_aldo3 {
     89	regulator-always-on;
     90	regulator-min-microvolt = <2700000>;
     91	regulator-max-microvolt = <3300000>;
     92	regulator-name = "avcc";
     93};
     94
     95&reg_dc5ldo {
     96	regulator-min-microvolt = <700000>;
     97	regulator-max-microvolt = <1320000>;
     98	regulator-name = "vdd-cpus";
     99};
    100
    101&reg_dcdc1 {
    102	regulator-always-on;
    103	regulator-min-microvolt = <3000000>;
    104	regulator-max-microvolt = <3000000>;
    105	regulator-name = "vcc-3v0";
    106};
    107
    108&reg_dcdc2 {
    109	regulator-min-microvolt = <700000>;
    110	regulator-max-microvolt = <1320000>;
    111	regulator-name = "vdd-gpu";
    112};
    113
    114&reg_dcdc3 {
    115	regulator-always-on;
    116	regulator-min-microvolt = <700000>;
    117	regulator-max-microvolt = <1320000>;
    118	regulator-name = "vdd-cpu";
    119};
    120
    121&reg_dcdc4 {
    122	regulator-always-on;
    123	regulator-min-microvolt = <700000>;
    124	regulator-max-microvolt = <1320000>;
    125	regulator-name = "vdd-sys-dll";
    126};
    127
    128&reg_dcdc5 {
    129	regulator-always-on;
    130	regulator-min-microvolt = <1500000>;
    131	regulator-max-microvolt = <1500000>;
    132	regulator-name = "vcc-dram";
    133};
    134
    135/* UART0 pads available on core board */
    136&uart0 {
    137	pinctrl-names = "default";
    138	pinctrl-0 = <&uart0_ph_pins>;
    139	status = "okay";
    140};
    141