cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun7i-a20-hummingbird.dts (5168B)


      1/*
      2 * Copyright 2013 Wills Wang
      3 *
      4 * Wills Wang <wills.wang.open@gmail.com>
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This file is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This file is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 * Or, alternatively,
     22 *
     23 *  b) Permission is hereby granted, free of charge, to any person
     24 *     obtaining a copy of this software and associated documentation
     25 *     files (the "Software"), to deal in the Software without
     26 *     restriction, including without limitation the rights to use,
     27 *     copy, modify, merge, publish, distribute, sublicense, and/or
     28 *     sell copies of the Software, and to permit persons to whom the
     29 *     Software is furnished to do so, subject to the following
     30 *     conditions:
     31 *
     32 *     The above copyright notice and this permission notice shall be
     33 *     included in all copies or substantial portions of the Software.
     34 *
     35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42 *     OTHER DEALINGS IN THE SOFTWARE.
     43 */
     44
     45/dts-v1/;
     46#include "sun7i-a20.dtsi"
     47#include "sunxi-common-regulators.dtsi"
     48
     49#include <dt-bindings/gpio/gpio.h>
     50#include <dt-bindings/interrupt-controller/irq.h>
     51
     52/ {
     53	model = "Merrii A20 Hummingbird";
     54	compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20";
     55
     56	aliases {
     57		serial0 = &uart0;
     58		serial1 = &uart2;
     59		serial2 = &uart3;
     60		serial3 = &uart4;
     61		serial4 = &uart5;
     62	};
     63
     64	chosen {
     65		stdout-path = "serial0:115200n8";
     66	};
     67
     68	reg_mmc3_vdd: mmc3_vdd {
     69		compatible = "regulator-fixed";
     70		regulator-name = "mmc3_vdd";
     71		regulator-min-microvolt = <3000000>;
     72		regulator-max-microvolt = <3000000>;
     73		enable-active-high;
     74		gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
     75	};
     76
     77	reg_gmac_vdd: gmac_vdd {
     78		compatible = "regulator-fixed";
     79		regulator-name = "gmac_vdd";
     80		regulator-min-microvolt = <3000000>;
     81		regulator-max-microvolt = <3000000>;
     82		enable-active-high;
     83		gpio = <&pio 7 16 GPIO_ACTIVE_HIGH>; /* PH16 */
     84	};
     85};
     86
     87&ahci {
     88	target-supply = <&reg_ahci_5v>;
     89	status = "okay";
     90};
     91
     92&ehci0 {
     93	status = "okay";
     94};
     95
     96&ehci1 {
     97	status = "okay";
     98};
     99
    100&gmac {
    101	pinctrl-names = "default";
    102	pinctrl-0 = <&gmac_rgmii_pins>;
    103	phy-handle = <&phy1>;
    104	phy-mode = "rgmii";
    105	phy-supply = <&reg_gmac_vdd>;
    106	status = "okay";
    107};
    108
    109&i2c0 {
    110	status = "okay";
    111
    112	axp209: pmic@34 {
    113		compatible = "x-powers,axp209";
    114		reg = <0x34>;
    115		interrupt-parent = <&nmi_intc>;
    116		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    117		interrupt-controller;
    118		#interrupt-cells = <1>;
    119	};
    120};
    121
    122&i2c1 {
    123	status = "okay";
    124};
    125
    126&i2c2 {
    127	status = "okay";
    128};
    129
    130&i2c3 {
    131	status = "okay";
    132};
    133
    134&ir0 {
    135	pinctrl-names = "default";
    136	pinctrl-0 = <&ir0_rx_pin>;
    137	status = "okay";
    138};
    139
    140&gmac_mdio {
    141	phy1: ethernet-phy@1 {
    142		reg = <1>;
    143		reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
    144		reset-assert-us = <10000>;
    145		/* wait 1s after reset, otherwise fail to read phy id */
    146		reset-deassert-us = <1000000>;
    147	};
    148};
    149
    150&mmc0 {
    151	vmmc-supply = <&reg_vcc3v0>;
    152	bus-width = <4>;
    153	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
    154	status = "okay";
    155};
    156
    157&mmc3 {
    158	vmmc-supply = <&reg_mmc3_vdd>;
    159	bus-width = <4>;
    160	non-removable;
    161	status = "okay";
    162};
    163
    164&ohci0 {
    165	status = "okay";
    166};
    167
    168&ohci1 {
    169	status = "okay";
    170};
    171
    172&pwm {
    173	pinctrl-names = "default";
    174	pinctrl-0 = <&pwm0_pin>;
    175	status = "okay";
    176};
    177
    178&reg_ahci_5v {
    179	gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */
    180	status = "okay";
    181};
    182
    183&reg_usb1_vbus {
    184	gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
    185	status = "okay";
    186};
    187
    188&reg_usb2_vbus {
    189	status = "okay";
    190};
    191
    192&spi2 {
    193	pinctrl-names = "default";
    194	pinctrl-0 = <&spi2_pb_pins>,
    195		    <&spi2_cs0_pb_pin>;
    196	status = "okay";
    197};
    198
    199&uart0 {
    200	pinctrl-names = "default";
    201	pinctrl-0 = <&uart0_pb_pins>;
    202	status = "okay";
    203};
    204
    205&uart2 {
    206	pinctrl-names = "default";
    207	pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
    208	status = "okay";
    209};
    210
    211&uart3 {
    212	pinctrl-names = "default";
    213	pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
    214	status = "okay";
    215};
    216
    217&uart4 {
    218	pinctrl-names = "default";
    219	pinctrl-0 = <&uart4_pg_pins>;
    220	status = "okay";
    221};
    222
    223&uart5 {
    224	pinctrl-names = "default";
    225	pinctrl-0 = <&uart5_pi_pins>;
    226	status = "okay";
    227};
    228
    229&usbphy {
    230	usb1_vbus-supply = <&reg_usb1_vbus>;
    231	usb2_vbus-supply = <&reg_usb2_vbus>;
    232	status = "okay";
    233};