cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun7i-a20-m3.dts (3604B)

      1/*
      2 * Copyright 2014 Hans de Goede <hdegoede@redhat.com>
      3 *
      4 * Hans de Goede <hdegoede@redhat.com>
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This file is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This file is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 * Or, alternatively,
     22 *
     23 *  b) Permission is hereby granted, free of charge, to any person
     24 *     obtaining a copy of this software and associated documentation
     25 *     files (the "Software"), to deal in the Software without
     26 *     restriction, including without limitation the rights to use,
     27 *     copy, modify, merge, publish, distribute, sublicense, and/or
     28 *     sell copies of the Software, and to permit persons to whom the
     29 *     Software is furnished to do so, subject to the following
     30 *     conditions:
     31 *
     32 *     The above copyright notice and this permission notice shall be
     33 *     included in all copies or substantial portions of the Software.
     34 *
     35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42 *     OTHER DEALINGS IN THE SOFTWARE.
     43 */
     44
     45/dts-v1/;
     46#include "sun7i-a20.dtsi"
     47#include "sunxi-common-regulators.dtsi"
     48
     49#include <dt-bindings/gpio/gpio.h>
     50#include <dt-bindings/interrupt-controller/irq.h>
     51
     52/ {
     53	model = "Mele M3";
     54	compatible = "mele,m3", "allwinner,sun7i-a20";
     55
     56	aliases {
     57		serial0 = &uart0;
     58	};
     59
     60	chosen {
     61		stdout-path = "serial0:115200n8";
     62	};
     63
     64	leds {
     65		compatible = "gpio-leds";
     66
     67		led {
     68			label = "m3:blue:usr";
     69			gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
     70		};
     71	};
     72};
     73
     74&ehci0 {
     75	status = "okay";
     76};
     77
     78&ehci1 {
     79	status = "okay";
     80};
     81
     82&gmac {
     83	pinctrl-names = "default";
     84	pinctrl-0 = <&gmac_mii_pins>;
     85	phy-handle = <&phy1>;
     86	phy-mode = "mii";
     87	status = "okay";
     88};
     89
     90&i2c0 {
     91	status = "okay";
     92
     93	axp209: pmic@34 {
     94		compatible = "x-powers,axp209";
     95		reg = <0x34>;
     96		interrupt-parent = <&nmi_intc>;
     97		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
     98
     99		interrupt-controller;
    100		#interrupt-cells = <1>;
    101	};
    102};
    103
    104&ir0 {
    105	pinctrl-names = "default";
    106	pinctrl-0 = <&ir0_rx_pin>;
    107	status = "okay";
    108};
    109
    110&gmac_mdio {
    111	phy1: ethernet-phy@1 {
    112		reg = <1>;
    113	};
    114};
    115
    116&mmc0 {
    117	vmmc-supply = <&reg_vcc3v3>;
    118	bus-width = <4>;
    119	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
    120	status = "okay";
    121};
    122
    123&mmc2 {
    124	vmmc-supply = <&reg_vcc3v3>;
    125	bus-width = <4>;
    126	non-removable;
    127	status = "okay";
    128};
    129
    130&ohci0 {
    131	status = "okay";
    132};
    133
    134&ohci1 {
    135	status = "okay";
    136};
    137
    138&reg_usb1_vbus {
    139	status = "okay";
    140};
    141
    142&reg_usb2_vbus {
    143	status = "okay";
    144};
    145
    146&uart0 {
    147	pinctrl-names = "default";
    148	pinctrl-0 = <&uart0_pb_pins>;
    149	status = "okay";
    150};
    151
    152&usbphy {
    153	usb1_vbus-supply = <&reg_usb1_vbus>;
    154	usb2_vbus-supply = <&reg_usb2_vbus>;
    155	status = "okay";
    156};