cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun7i-a20-olimex-som204-evb.dts (5244B)


      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Device Tree Source for A20-SOM204-EVB Board
      4 *
      5 * Copyright (C) 2018 Olimex Ltd.
      6 *   Author: Stefan Mavrodiev <stefan@olimex.com>
      7 */
      8
      9/dts-v1/;
     10#include "sun7i-a20.dtsi"
     11#include "sunxi-common-regulators.dtsi"
     12
     13
     14#include <dt-bindings/gpio/gpio.h>
     15#include <dt-bindings/interrupt-controller/irq.h>
     16#include <dt-bindings/pwm/pwm.h>
     17
     18/ {
     19	model = "Olimex A20-SOM204-EVB";
     20	compatible = "olimex,a20-olimex-som204-evb", "allwinner,sun7i-a20";
     21
     22	aliases {
     23		serial0 = &uart0;
     24		serial1 = &uart4;
     25		serial2 = &uart7;
     26		spi0 = &spi1;
     27		spi1 = &spi2;
     28		ethernet1 = &rtl8723bs;
     29	};
     30
     31	chosen {
     32		stdout-path = "serial0:115200n8";
     33	};
     34
     35	hdmi-connector {
     36		compatible = "hdmi-connector";
     37		type = "a";
     38
     39		port {
     40			hdmi_con_in: endpoint {
     41				remote-endpoint = <&hdmi_out_con>;
     42			};
     43		};
     44	};
     45
     46	leds {
     47		compatible = "gpio-leds";
     48
     49		led-0 {
     50			label = "a20-som204-evb:green:stat";
     51			gpios = <&pio 8 0 GPIO_ACTIVE_HIGH>;
     52			default-state = "on";
     53		};
     54
     55		led-1 {
     56			label = "a20-som204-evb:green:led1";
     57			gpios = <&pio 8 10 GPIO_ACTIVE_HIGH>;
     58			default-state = "on";
     59		};
     60
     61		led-2 {
     62			label = "a20-som204-evb:yellow:led2";
     63			gpios = <&pio 8 11 GPIO_ACTIVE_HIGH>;
     64			default-state = "on";
     65		};
     66	};
     67
     68	rtl_pwrseq: rtl_pwrseq {
     69		compatible = "mmc-pwrseq-simple";
     70		reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>;
     71	};
     72};
     73
     74&ahci {
     75	target-supply = <&reg_ahci_5v>;
     76	status = "okay";
     77};
     78
     79&can0 {
     80	pinctrl-names = "default";
     81	pinctrl-0 = <&can_ph_pins>;
     82	status = "okay";
     83};
     84
     85&codec {
     86	status = "okay";
     87};
     88
     89&cpu0 {
     90	cpu-supply = <&reg_dcdc2>;
     91};
     92
     93&de {
     94	status = "okay";
     95};
     96
     97&ehci0 {
     98	status = "okay";
     99};
    100
    101&ehci1 {
    102	status = "okay";
    103};
    104
    105&gmac {
    106	pinctrl-names = "default";
    107	pinctrl-0 = <&gmac_rgmii_pins>;
    108	phy-handle = <&phy3>;
    109	phy-mode = "rgmii";
    110	phy-supply = <&reg_vcc3v3>;
    111	status = "okay";
    112};
    113
    114&hdmi {
    115	status = "okay";
    116};
    117
    118&hdmi_out {
    119	hdmi_out_con: endpoint {
    120		remote-endpoint = <&hdmi_con_in>;
    121	};
    122};
    123
    124&i2c0 {
    125	status = "okay";
    126
    127	axp209: pmic@34 {
    128		reg = <0x34>;
    129		interrupt-parent = <&nmi_intc>;
    130		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    131	};
    132};
    133
    134/* Exposed to UEXT1 */
    135&i2c1 {
    136	status = "okay";
    137
    138	eeprom: eeprom@50 {
    139		compatible = "atmel,24c16";
    140		reg = <0x50>;
    141		pagesize = <16>;
    142	};
    143};
    144
    145/* Exposed to UEXT2 */
    146&i2c2 {
    147	status = "okay";
    148};
    149
    150&ir0 {
    151	pinctrl-names = "default";
    152	pinctrl-0 = <&ir0_rx_pin>;
    153	status = "okay";
    154};
    155
    156&gmac_mdio {
    157	phy3: ethernet-phy@3 {
    158		reg = <3>;
    159		reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
    160		reset-assert-us = <10000>;
    161		/* wait 1s after reset, otherwise fail to read phy id */
    162		reset-deassert-us = <1000000>;
    163	};
    164};
    165
    166&mmc0 {
    167	vmmc-supply = <&reg_vcc3v3>;
    168	bus-width = <4>;
    169	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
    170	status = "okay";
    171};
    172
    173&mmc3 {
    174	vmmc-supply = <&reg_vcc3v3>;
    175	mmc-pwrseq = <&rtl_pwrseq>;
    176	bus-width = <4>;
    177	non-removable;
    178	status = "okay";
    179
    180	rtl8723bs: sdio_wifi@1 {
    181		reg = <1>;
    182	};
    183};
    184
    185&ohci0 {
    186	status = "okay";
    187};
    188
    189&ohci1 {
    190	status = "okay";
    191};
    192
    193&otg_sram {
    194	status = "okay";
    195};
    196
    197&pio {
    198	uart3_rts_pin: uart3-rts-pin {
    199		pins = "PG8";
    200		function = "uart3";
    201	};
    202};
    203
    204#include "axp209.dtsi"
    205
    206&ac_power_supply {
    207	status = "okay";
    208};
    209
    210&battery_power_supply {
    211	status = "okay";
    212};
    213
    214&reg_ahci_5v {
    215	gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>;
    216	status = "okay";
    217};
    218
    219&reg_dcdc2 {
    220	regulator-always-on;
    221	regulator-min-microvolt = <1000000>;
    222	regulator-max-microvolt = <1400000>;
    223	regulator-name = "vdd-cpu";
    224};
    225
    226&reg_dcdc3 {
    227	regulator-always-on;
    228	regulator-min-microvolt = <1000000>;
    229	regulator-max-microvolt = <1400000>;
    230	regulator-name = "vdd-int-dll";
    231};
    232
    233&reg_ldo1 {
    234	regulator-always-on;
    235	regulator-min-microvolt = <1300000>;
    236	regulator-max-microvolt = <1300000>;
    237	regulator-name = "vdd-rtc";
    238};
    239
    240&reg_ldo2 {
    241	regulator-always-on;
    242	regulator-min-microvolt = <3000000>;
    243	regulator-max-microvolt = <3000000>;
    244	regulator-name = "avcc";
    245};
    246
    247&reg_ldo4 {
    248	regulator-min-microvolt = <3300000>;
    249	regulator-max-microvolt = <3300000>;
    250	regulator-name = "vcc-pg";
    251};
    252
    253&reg_usb0_vbus {
    254	gpio = <&pio 2 17 GPIO_ACTIVE_HIGH>;
    255	status = "okay";
    256};
    257
    258&reg_usb1_vbus {
    259	status = "okay";
    260};
    261
    262&reg_usb2_vbus {
    263	status = "okay";
    264};
    265
    266/* Exposed to UEXT1 */
    267&spi1 {
    268	pinctrl-names = "default";
    269	pinctrl-0 = <&spi1_pi_pins>,
    270		    <&spi1_cs0_pi_pin>;
    271	status = "okay";
    272};
    273
    274/* Exposed to UEXT2 */
    275&spi2 {
    276	pinctrl-names = "default";
    277	pinctrl-0 = <&spi2_pc_pins>,
    278		    <&spi2_cs0_pc_pin>;
    279	status = "okay";
    280};
    281
    282&uart0 {
    283	pinctrl-names = "default";
    284	pinctrl-0 = <&uart0_pb_pins>;
    285	status = "okay";
    286};
    287
    288/* Used for RTL8723BS bluetooth */
    289&uart3 {
    290	pinctrl-names = "default";
    291	pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_pin>;
    292	status = "okay";
    293};
    294
    295/* Exposed to UEXT1 */
    296&uart4 {
    297	pinctrl-names = "default";
    298	pinctrl-0 = <&uart4_pg_pins>;
    299	status = "okay";
    300};
    301
    302/* Exposed to UEXT2 */
    303&uart7 {
    304	pinctrl-names = "default";
    305	pinctrl-0 = <&uart7_pi_pins>;
    306	status = "okay";
    307};
    308
    309&usb_otg {
    310	dr_mode = "otg";
    311	status = "okay";
    312};
    313
    314&usb_power_supply {
    315	status = "okay";
    316};
    317
    318&usbphy {
    319	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
    320	usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
    321	usb0_vbus_power-supply = <&usb_power_supply>;
    322	usb0_vbus-supply = <&reg_usb0_vbus>;
    323	usb1_vbus-supply = <&reg_usb1_vbus>;
    324	usb2_vbus-supply = <&reg_usb2_vbus>;
    325	status = "okay";
    326};