cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun7i-a20-pcduino3.dts (4787B)


      1/*
      2 * Copyright 2014 Zoltan HERPAI
      3 * Zoltan HERPAI <wigyori@uid0.hu>
      4 *
      5 * This file is dual-licensed: you can use it either under the terms
      6 * of the GPL or the X11 license, at your option. Note that this dual
      7 * licensing only applies to this file, and not this project as a
      8 * whole.
      9 *
     10 *  a) This file is free software; you can redistribute it and/or
     11 *     modify it under the terms of the GNU General Public License as
     12 *     published by the Free Software Foundation; either version 2 of the
     13 *     License, or (at your option) any later version.
     14 *
     15 *     This file is distributed in the hope that it will be useful,
     16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18 *     GNU General Public License for more details.
     19 *
     20 * Or, alternatively,
     21 *
     22 *  b) Permission is hereby granted, free of charge, to any person
     23 *     obtaining a copy of this software and associated documentation
     24 *     files (the "Software"), to deal in the Software without
     25 *     restriction, including without limitation the rights to use,
     26 *     copy, modify, merge, publish, distribute, sublicense, and/or
     27 *     sell copies of the Software, and to permit persons to whom the
     28 *     Software is furnished to do so, subject to the following
     29 *     conditions:
     30 *
     31 *     The above copyright notice and this permission notice shall be
     32 *     included in all copies or substantial portions of the Software.
     33 *
     34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     41 *     OTHER DEALINGS IN THE SOFTWARE.
     42 */
     43
     44/dts-v1/;
     45#include "sun7i-a20.dtsi"
     46#include "sunxi-common-regulators.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49#include <dt-bindings/input/input.h>
     50#include <dt-bindings/interrupt-controller/irq.h>
     51
     52/ {
     53	model = "LinkSprite pcDuino3";
     54	compatible = "linksprite,pcduino3", "allwinner,sun7i-a20";
     55
     56	aliases {
     57		serial0 = &uart0;
     58	};
     59
     60	chosen {
     61		stdout-path = "serial0:115200n8";
     62	};
     63
     64	leds {
     65		compatible = "gpio-leds";
     66
     67		led-0 {
     68			label = "pcduino3:green:tx";
     69			gpios = <&pio 7 15 GPIO_ACTIVE_LOW>;
     70		};
     71
     72		led-1 {
     73			label = "pcduino3:green:rx";
     74			gpios = <&pio 7 16 GPIO_ACTIVE_LOW>;
     75		};
     76	};
     77
     78	gpio-keys {
     79		compatible = "gpio-keys";
     80
     81		back {
     82			label = "Key Back";
     83			linux,code = <KEY_BACK>;
     84			gpios = <&pio 7 17 GPIO_ACTIVE_LOW>;
     85		};
     86
     87		home {
     88			label = "Key Home";
     89			linux,code = <KEY_HOME>;
     90			gpios = <&pio 7 18 GPIO_ACTIVE_LOW>;
     91		};
     92
     93		menu {
     94			label = "Key Menu";
     95			linux,code = <KEY_MENU>;
     96			gpios = <&pio 7 19 GPIO_ACTIVE_LOW>;
     97		};
     98	};
     99};
    100
    101&ahci {
    102	target-supply = <&reg_ahci_5v>;
    103	status = "okay";
    104};
    105
    106&codec {
    107	status = "okay";
    108};
    109
    110&cpu0 {
    111	cpu-supply = <&reg_dcdc2>;
    112};
    113
    114&ehci0 {
    115	status = "okay";
    116};
    117
    118&ehci1 {
    119	status = "okay";
    120};
    121
    122&gmac {
    123	pinctrl-names = "default";
    124	pinctrl-0 = <&gmac_mii_pins>;
    125	phy-handle = <&phy1>;
    126	phy-mode = "mii";
    127	status = "okay";
    128};
    129
    130&i2c0 {
    131	status = "okay";
    132
    133	axp209: pmic@34 {
    134		reg = <0x34>;
    135		interrupt-parent = <&nmi_intc>;
    136		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    137	};
    138};
    139
    140#include "axp209.dtsi"
    141
    142&ir0 {
    143	pinctrl-names = "default";
    144	pinctrl-0 = <&ir0_rx_pin>;
    145	status = "okay";
    146};
    147
    148&gmac_mdio {
    149	phy1: ethernet-phy@1 {
    150		reg = <1>;
    151	};
    152};
    153
    154&mmc0 {
    155	vmmc-supply = <&reg_vcc3v3>;
    156	bus-width = <4>;
    157	cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
    158	status = "okay";
    159};
    160
    161&ohci0 {
    162	status = "okay";
    163};
    164
    165&ohci1 {
    166	status = "okay";
    167};
    168
    169&otg_sram {
    170	status = "okay";
    171};
    172
    173&reg_ahci_5v {
    174	gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>;
    175	status = "okay";
    176};
    177
    178&reg_dcdc2 {
    179	regulator-always-on;
    180	regulator-min-microvolt = <1000000>;
    181	regulator-max-microvolt = <1400000>;
    182	regulator-name = "vdd-cpu";
    183};
    184
    185&reg_dcdc3 {
    186	regulator-always-on;
    187	regulator-min-microvolt = <1000000>;
    188	regulator-max-microvolt = <1400000>;
    189	regulator-name = "vdd-int-pll";
    190};
    191
    192&reg_ldo1 {
    193	regulator-name = "vdd-rtc";
    194};
    195
    196&reg_ldo2 {
    197	regulator-always-on;
    198	regulator-min-microvolt = <3000000>;
    199	regulator-max-microvolt = <3000000>;
    200	regulator-name = "avcc";
    201};
    202
    203&reg_usb1_vbus {
    204	status = "okay";
    205};
    206
    207&reg_usb2_vbus {
    208	status = "okay";
    209};
    210
    211&uart0 {
    212	pinctrl-names = "default";
    213	pinctrl-0 = <&uart0_pb_pins>;
    214	status = "okay";
    215};
    216
    217&usb_otg {
    218	dr_mode = "otg";
    219	status = "okay";
    220};
    221
    222&usbphy {
    223	usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */
    224	usb1_vbus-supply = <&reg_usb1_vbus>;
    225	usb2_vbus-supply = <&reg_usb2_vbus>;
    226	status = "okay";
    227};