sun8i-a83t-allwinner-h8homlet-v2.dts (6783B)
1/* 2 * Copyright 2015 Vishnu Patekar 3 * Vishnu Patekar <vishnupatekar0510@gmail.com> 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This file is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of the 13 * License, or (at your option) any later version. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44/dts-v1/; 45#include "sun8i-a83t.dtsi" 46 47#include <dt-bindings/gpio/gpio.h> 48 49/ { 50 model = "Allwinner A83T H8Homlet Proto Dev Board v2.0"; 51 compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t"; 52 53 aliases { 54 serial0 = &uart0; 55 }; 56 57 chosen { 58 stdout-path = "serial0:115200n8"; 59 }; 60 61 reg_usb0_vbus: reg-usb0-vbus { 62 compatible = "regulator-fixed"; 63 regulator-name = "usb0-vbus"; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 regulator-boot-on; 67 enable-active-high; 68 gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ 69 }; 70 71 reg_usb1_vbus: reg-usb1-vbus { 72 compatible = "regulator-fixed"; 73 regulator-name = "usb1-vbus"; 74 regulator-min-microvolt = <5000000>; 75 regulator-max-microvolt = <5000000>; 76 regulator-boot-on; 77 enable-active-high; 78 gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ 79 }; 80}; 81 82&cpu0 { 83 cpu-supply = <®_dcdc2>; 84}; 85 86&cpu100 { 87 cpu-supply = <®_dcdc3>; 88}; 89 90&ehci0 { 91 status = "okay"; 92}; 93 94&mmc0 { 95 pinctrl-names = "default"; 96 pinctrl-0 = <&mmc0_pins>; 97 vmmc-supply = <®_dcdc1>; 98 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ 99 bus-width = <4>; 100 status = "okay"; 101}; 102 103&mmc2 { 104 pinctrl-names = "default"; 105 pinctrl-0 = <&mmc2_8bit_emmc_pins>; 106 vmmc-supply = <®_dcdc1>; 107 vqmmc-supply = <®_dcdc1>; 108 bus-width = <8>; 109 non-removable; 110 cap-mmc-hw-reset; 111 status = "okay"; 112}; 113 114&ohci0 { 115 status = "okay"; 116}; 117 118&r_rsb { 119 status = "okay"; 120 121 axp81x: pmic@3a3 { 122 compatible = "x-powers,axp818", "x-powers,axp813"; 123 reg = <0x3a3>; 124 interrupt-parent = <&r_intc>; 125 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 126 eldoin-supply = <®_dcdc1>; 127 swin-supply = <®_dcdc1>; 128 }; 129 130 ac100: codec@e89 { 131 compatible = "x-powers,ac100"; 132 reg = <0xe89>; 133 134 ac100_codec: codec { 135 compatible = "x-powers,ac100-codec"; 136 interrupt-parent = <&r_pio>; 137 interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */ 138 #clock-cells = <0>; 139 clock-output-names = "4M_adda"; 140 }; 141 142 ac100_rtc: rtc { 143 compatible = "x-powers,ac100-rtc"; 144 interrupt-parent = <&r_intc>; 145 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 146 clocks = <&ac100_codec>; 147 #clock-cells = <1>; 148 clock-output-names = "cko1_rtc", 149 "cko2_rtc", 150 "cko3_rtc"; 151 }; 152 }; 153}; 154 155#include "axp81x.dtsi" 156 157&ac_power_supply { 158 status = "okay"; 159}; 160 161®_aldo1 { 162 regulator-always-on; 163 regulator-min-microvolt = <1800000>; 164 regulator-max-microvolt = <1800000>; 165 regulator-name = "vcc-1v8"; 166}; 167 168®_aldo2 { 169 regulator-always-on; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 regulator-name = "dram-pll"; 173}; 174 175®_aldo3 { 176 regulator-always-on; 177 regulator-min-microvolt = <3000000>; 178 regulator-max-microvolt = <3000000>; 179 regulator-name = "avcc"; 180}; 181 182®_dcdc1 { 183 regulator-always-on; 184 regulator-min-microvolt = <3300000>; 185 regulator-max-microvolt = <3300000>; 186 regulator-name = "vcc-3v3"; 187}; 188 189®_dcdc2 { 190 regulator-always-on; 191 regulator-min-microvolt = <700000>; 192 regulator-max-microvolt = <1100000>; 193 regulator-name = "vdd-cpua"; 194}; 195 196®_dcdc3 { 197 regulator-always-on; 198 regulator-min-microvolt = <700000>; 199 regulator-max-microvolt = <1100000>; 200 regulator-name = "vdd-cpub"; 201}; 202 203®_dcdc4 { 204 regulator-min-microvolt = <700000>; 205 regulator-max-microvolt = <1100000>; 206 regulator-name = "vdd-gpu"; 207}; 208 209®_dcdc5 { 210 regulator-always-on; 211 regulator-min-microvolt = <1500000>; 212 regulator-max-microvolt = <1500000>; 213 regulator-name = "vcc-dram"; 214}; 215 216®_dcdc6 { 217 regulator-always-on; 218 regulator-min-microvolt = <900000>; 219 regulator-max-microvolt = <900000>; 220 regulator-name = "vdd-sys"; 221}; 222 223®_dldo2 { 224 regulator-min-microvolt = <3300000>; 225 regulator-max-microvolt = <3300000>; 226 regulator-name = "vcc-mipi"; 227}; 228 229®_dldo4 { 230 /* 231 * The PHY requires 20ms after all voltages are applied until core 232 * logic is ready and 30ms after the reset pin is de-asserted. 233 * Set a 100ms delay to account for PMIC ramp time and board traces. 234 */ 235 regulator-enable-ramp-delay = <100000>; 236 regulator-min-microvolt = <3300000>; 237 regulator-max-microvolt = <3300000>; 238 regulator-name = "vcc-ephy"; 239}; 240 241®_fldo1 { 242 regulator-min-microvolt = <1080000>; 243 regulator-max-microvolt = <1320000>; 244 regulator-name = "vdd12-hsic"; 245}; 246 247®_fldo2 { 248 /* 249 * Despite the embedded CPUs core not being used in any way, 250 * this must remain on or the system will hang. 251 */ 252 regulator-always-on; 253 regulator-min-microvolt = <700000>; 254 regulator-max-microvolt = <1100000>; 255 regulator-name = "vdd-cpus"; 256}; 257 258®_rtc_ldo { 259 regulator-name = "vcc-rtc"; 260}; 261 262®_sw { 263 regulator-name = "vcc-wifi"; 264}; 265 266&uart0 { 267 pinctrl-names = "default"; 268 pinctrl-0 = <&uart0_pb_pins>; 269 status = "okay"; 270}; 271 272&usbphy { 273 usb0_vbus-supply = <®_usb0_vbus>; 274 usb1_vbus-supply = <®_usb1_vbus>; 275 status = "okay"; 276}; 277 278&usb_otg { 279 dr_mode = "host"; 280 status = "okay"; 281};