cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun8i-a83t-cubietruck-plus.dts (10557B)


      1/*
      2 * Copyright 2015 Chen-Yu Tsai
      3 *
      4 * Chen-Yu Tsai <wens@csie.org>
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This file is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This file is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 * Or, alternatively,
     22 *
     23 *  b) Permission is hereby granted, free of charge, to any person
     24 *     obtaining a copy of this software and associated documentation
     25 *     files (the "Software"), to deal in the Software without
     26 *     restriction, including without limitation the rights to use,
     27 *     copy, modify, merge, publish, distribute, sublicense, and/or
     28 *     sell copies of the Software, and to permit persons to whom the
     29 *     Software is furnished to do so, subject to the following
     30 *     conditions:
     31 *
     32 *     The above copyright notice and this permission notice shall be
     33 *     included in all copies or substantial portions of the Software.
     34 *
     35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42 *     OTHER DEALINGS IN THE SOFTWARE.
     43 */
     44
     45/dts-v1/;
     46#include "sun8i-a83t.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49
     50/ {
     51	model = "Cubietech Cubietruck Plus";
     52	compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
     53
     54	aliases {
     55		ethernet0 = &emac;
     56		serial0 = &uart0;
     57	};
     58
     59	chosen {
     60		stdout-path = "serial0:115200n8";
     61	};
     62
     63	hdmi-connector {
     64		compatible = "hdmi-connector";
     65		type = "a";
     66
     67		port {
     68			hdmi_con_in: endpoint {
     69				remote-endpoint = <&hdmi_out_con>;
     70			};
     71		};
     72	};
     73
     74	leds {
     75		compatible = "gpio-leds";
     76
     77		led-0 {
     78			label = "cubietruck-plus:blue:usr";
     79			gpios = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */
     80		};
     81
     82		led-1 {
     83			label = "cubietruck-plus:orange:usr";
     84			gpios = <&pio 3 26 GPIO_ACTIVE_HIGH>; /* PD26 */
     85		};
     86
     87		led-2 {
     88			label = "cubietruck-plus:white:usr";
     89			gpios = <&pio 3 27 GPIO_ACTIVE_HIGH>; /* PD27 */
     90		};
     91
     92		led-3 {
     93			label = "cubietruck-plus:green:usr";
     94			gpios = <&pio 4 4 GPIO_ACTIVE_HIGH>; /* PE4 */
     95		};
     96	};
     97
     98	usb-hub {
     99		/* I2C is not connected */
    100		compatible = "smsc,usb3503";
    101		initial-mode = <1>; /* initialize in HUB mode */
    102		disabled-ports = <1>;
    103		intn-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
    104		reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
    105		connect-gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
    106		refclk-frequency = <19200000>;
    107	};
    108
    109	reg_usb1_vbus: reg-usb1-vbus {
    110		compatible = "regulator-fixed";
    111		regulator-name = "usb1-vbus";
    112		regulator-min-microvolt = <5000000>;
    113		regulator-max-microvolt = <5000000>;
    114		regulator-boot-on;
    115		enable-active-high;
    116		gpio = <&pio 3 29 GPIO_ACTIVE_HIGH>; /* PD29 */
    117	};
    118
    119	reg_usb2_vbus: reg-usb2-vbus {
    120		compatible = "regulator-fixed";
    121		regulator-name = "usb2-vbus";
    122		regulator-min-microvolt = <5000000>;
    123		regulator-max-microvolt = <5000000>;
    124		regulator-boot-on;
    125		enable-active-high;
    126		gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
    127	};
    128
    129	sound {
    130		compatible = "simple-audio-card";
    131		simple-audio-card,name = "On-board SPDIF";
    132
    133		simple-audio-card,cpu {
    134			sound-dai = <&spdif>;
    135		};
    136
    137		simple-audio-card,codec {
    138			sound-dai = <&spdif_out>;
    139		};
    140	};
    141
    142	spdif_out: spdif-out {
    143		#sound-dai-cells = <0>;
    144		compatible = "linux,spdif-dit";
    145	};
    146
    147	wifi_pwrseq: wifi_pwrseq {
    148		compatible = "mmc-pwrseq-simple";
    149		clocks = <&ac100_rtc 1>;
    150		clock-names = "ext_clock";
    151		/* The WiFi low power clock must be 32768 Hz */
    152		assigned-clocks = <&ac100_rtc 1>;
    153		assigned-clock-rates = <32768>;
    154		/* enables internal regulator and de-asserts reset */
    155		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
    156	};
    157};
    158
    159&cpu0 {
    160	cpu-supply = <&reg_dcdc2>;
    161};
    162
    163&cpu100 {
    164	cpu-supply = <&reg_dcdc3>;
    165};
    166
    167&de {
    168	status = "okay";
    169};
    170
    171&ehci0 {
    172	/* GL830 USB-to-SATA bridge here */
    173	status = "okay";
    174};
    175
    176&ehci1 {
    177	/* USB3503 HSIC USB 2.0 hub here */
    178	status = "okay";
    179};
    180
    181&emac {
    182	pinctrl-names = "default";
    183	pinctrl-0 = <&emac_rgmii_pins>;
    184	phy-supply = <&reg_dldo4>;
    185	phy-handle = <&rgmii_phy>;
    186	phy-mode = "rgmii-id";
    187	status = "okay";
    188};
    189
    190&hdmi {
    191	status = "okay";
    192};
    193
    194&hdmi_out {
    195	hdmi_out_con: endpoint {
    196		remote-endpoint = <&hdmi_con_in>;
    197	};
    198};
    199
    200&mdio {
    201	rgmii_phy: ethernet-phy@1 {
    202		compatible = "ethernet-phy-ieee802.3-c22";
    203		reg = <1>;
    204	};
    205};
    206
    207&mmc0 {
    208	pinctrl-names = "default";
    209	pinctrl-0 = <&mmc0_pins>;
    210	vmmc-supply = <&reg_dcdc1>;
    211	bus-width = <4>;
    212	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
    213	status = "okay";
    214};
    215
    216&mmc1 {
    217	vmmc-supply = <&reg_dcdc1>;
    218	vqmmc-supply = <&reg_sw>;
    219	mmc-pwrseq = <&wifi_pwrseq>;
    220	bus-width = <4>;
    221	non-removable;
    222	status = "okay";
    223};
    224
    225&mmc2 {
    226	pinctrl-names = "default";
    227	pinctrl-0 = <&mmc2_8bit_emmc_pins>;
    228	vmmc-supply = <&reg_dcdc1>;
    229	bus-width = <8>;
    230	non-removable;
    231	cap-mmc-hw-reset;
    232	status = "okay";
    233};
    234
    235&r_rsb {
    236	status = "okay";
    237
    238	axp81x: pmic@3a3 {
    239		compatible = "x-powers,axp818", "x-powers,axp813";
    240		reg = <0x3a3>;
    241		interrupt-parent = <&r_intc>;
    242		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
    243		eldoin-supply = <&reg_dcdc1>;
    244		swin-supply = <&reg_dcdc1>;
    245		x-powers,drive-vbus-en;
    246	};
    247
    248	ac100: codec@e89 {
    249		compatible = "x-powers,ac100";
    250		reg = <0xe89>;
    251
    252		ac100_codec: codec {
    253			compatible = "x-powers,ac100-codec";
    254			interrupt-parent = <&r_pio>;
    255			interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
    256			#clock-cells = <0>;
    257			clock-output-names = "4M_adda";
    258		};
    259
    260		ac100_rtc: rtc {
    261			compatible = "x-powers,ac100-rtc";
    262			interrupt-parent = <&r_intc>;
    263			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
    264			clocks = <&ac100_codec>;
    265			#clock-cells = <1>;
    266			clock-output-names = "cko1_rtc",
    267					     "cko2_rtc",
    268					     "cko3_rtc";
    269		};
    270	};
    271};
    272
    273#include "axp81x.dtsi"
    274
    275&ac_power_supply {
    276	status = "okay";
    277};
    278
    279&battery_power_supply {
    280	status = "okay";
    281};
    282
    283&reg_aldo1 {
    284	regulator-always-on;
    285	regulator-min-microvolt = <1800000>;
    286	regulator-max-microvolt = <1800000>;
    287	regulator-name = "vcc-1v8";
    288};
    289
    290&reg_aldo2 {
    291	regulator-always-on;
    292	regulator-min-microvolt = <1800000>;
    293	regulator-max-microvolt = <1800000>;
    294	regulator-name = "dram-pll";
    295};
    296
    297&reg_aldo3 {
    298	regulator-always-on;
    299	regulator-min-microvolt = <3000000>;
    300	regulator-max-microvolt = <3000000>;
    301	regulator-name = "avcc";
    302};
    303
    304&reg_dcdc1 {
    305	/*
    306	 * The schematics say this should be 3.3V, but the FEX file says
    307	 * it should be 3V. The latter makes sense, as the WiFi module's
    308	 * I/O is indirectly powered from DCDC1, through SW. It is rated
    309	 * at 2.98V maximum.
    310	 */
    311	regulator-always-on;
    312	regulator-min-microvolt = <3000000>;
    313	regulator-max-microvolt = <3000000>;
    314	regulator-name = "vcc-3v";
    315};
    316
    317&reg_dcdc2 {
    318	regulator-always-on;
    319	regulator-min-microvolt = <700000>;
    320	regulator-max-microvolt = <1100000>;
    321	regulator-name = "vdd-cpua";
    322};
    323
    324&reg_dcdc3 {
    325	regulator-always-on;
    326	regulator-min-microvolt = <700000>;
    327	regulator-max-microvolt = <1100000>;
    328	regulator-name = "vdd-cpub";
    329};
    330
    331&reg_dcdc4 {
    332	regulator-min-microvolt = <700000>;
    333	regulator-max-microvolt = <1100000>;
    334	regulator-name = "vdd-gpu";
    335};
    336
    337&reg_dcdc5 {
    338	regulator-always-on;
    339	regulator-min-microvolt = <1500000>;
    340	regulator-max-microvolt = <1500000>;
    341	regulator-name = "vcc-dram";
    342};
    343
    344&reg_dcdc6 {
    345	regulator-always-on;
    346	regulator-min-microvolt = <900000>;
    347	regulator-max-microvolt = <900000>;
    348	regulator-name = "vdd-sys";
    349};
    350
    351&reg_dldo2 {
    352	regulator-min-microvolt = <3300000>;
    353	regulator-max-microvolt = <3300000>;
    354	regulator-name = "dp-pwr";
    355};
    356
    357&reg_dldo3 {
    358	regulator-always-on;
    359	regulator-min-microvolt = <2500000>;
    360	regulator-max-microvolt = <2500000>;
    361	regulator-name = "ephy-io";
    362};
    363
    364&reg_dldo4 {
    365	/*
    366	 * The PHY requires 20ms after all voltages are applied until core
    367	 * logic is ready and 30ms after the reset pin is de-asserted.
    368	 * Set a 100ms delay to account for PMIC ramp time and board traces.
    369	 */
    370	regulator-enable-ramp-delay = <100000>;
    371	regulator-min-microvolt = <3300000>;
    372	regulator-max-microvolt = <3300000>;
    373	regulator-name = "ephy";
    374};
    375
    376&reg_drivevbus {
    377	regulator-name = "usb0-vbus";
    378	status = "okay";
    379};
    380
    381&reg_eldo1 {
    382	regulator-min-microvolt = <1200000>;
    383	regulator-max-microvolt = <1200000>;
    384	regulator-name = "dp-bridge-1";
    385};
    386
    387&reg_eldo2 {
    388	regulator-min-microvolt = <1200000>;
    389	regulator-max-microvolt = <1200000>;
    390	regulator-name = "dp-bridge-2";
    391};
    392
    393&reg_fldo1 {
    394	/* TODO should be handled by USB PHY */
    395	regulator-always-on;
    396	regulator-min-microvolt = <1080000>;
    397	regulator-max-microvolt = <1320000>;
    398	regulator-name = "vdd12-hsic";
    399};
    400
    401&reg_fldo2 {
    402	/*
    403	 * Despite the embedded CPUs core not being used in any way,
    404	 * this must remain on or the system will hang.
    405	 */
    406	regulator-always-on;
    407	regulator-min-microvolt = <700000>;
    408	regulator-max-microvolt = <1100000>;
    409	regulator-name = "vdd-cpus";
    410};
    411
    412&reg_rtc_ldo {
    413	regulator-name = "vcc-rtc";
    414};
    415
    416&reg_sw {
    417	regulator-name = "vcc-wifi-io";
    418};
    419
    420&spdif {
    421	status = "okay";
    422};
    423
    424&uart0 {
    425	pinctrl-names = "default";
    426	pinctrl-0 = <&uart0_pb_pins>;
    427	status = "okay";
    428};
    429
    430&uart1 {
    431	pinctrl-names = "default";
    432	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
    433	uart-has-rtscts;
    434	status = "okay";
    435
    436	bluetooth {
    437		compatible = "brcm,bcm4330-bt";
    438		clocks = <&ac100_rtc 1>;
    439		clock-names = "lpo";
    440		vbat-supply = <&reg_dcdc1>;
    441		vddio-supply = <&reg_sw>;
    442		device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
    443		host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
    444		shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
    445	};
    446};
    447
    448&usb_otg {
    449	dr_mode = "otg";
    450	status = "okay";
    451};
    452
    453&usb_power_supply {
    454	status = "okay";
    455};
    456
    457&usbphy {
    458	usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
    459	usb0_vbus_power-supply = <&usb_power_supply>;
    460	usb0_vbus-supply = <&reg_drivevbus>;
    461	usb1_vbus-supply = <&reg_usb1_vbus>;
    462	usb2_vbus-supply = <&reg_usb2_vbus>;
    463	status = "okay";
    464};