cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun8i-h3-mapleboard-mp130.dts (2315B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright (C) 2017 Centrum Embedded Systems, Jia-Bin Huang <jb@ces.com.tw>
      4 * Copyright (C) 2018 Jonathan McDowell <noodles@earth.li>
      5 */
      6
      7/dts-v1/;
      8#include "sun8i-h3.dtsi"
      9#include "sunxi-common-regulators.dtsi"
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/input/input.h>
     13
     14/ {
     15	model = "MapleBoard MP130";
     16	compatible = "mapleboard,mp130", "allwinner,sun8i-h3";
     17
     18	aliases {
     19		ethernet0 = &emac;
     20		serial0 = &uart0;
     21	};
     22
     23	chosen {
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	leds {
     28		compatible = "gpio-leds";
     29
     30		pwr_led {
     31			label = "mp130:orange:pwr";
     32			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
     33			default-state = "on";
     34		};
     35
     36		status_led {
     37			label = "mp130:orange:status";
     38			gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
     39		};
     40	};
     41
     42	r_gpio_keys {
     43		compatible = "gpio-keys";
     44
     45		power {
     46			label = "power";
     47			linux,code = <KEY_POWER>;
     48			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
     49		};
     50
     51		user {
     52			label = "user";
     53			linux,code = <BTN_0>;
     54			gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
     55		};
     56	};
     57};
     58
     59&codec {
     60	allwinner,audio-routing =
     61		"Line Out", "LINEOUT",
     62		"LINEIN", "Line In";
     63	status = "okay";
     64};
     65
     66&ehci1 {
     67	status = "okay";
     68};
     69
     70&ehci2 {
     71	status = "okay";
     72};
     73
     74&ehci3 {
     75	status = "okay";
     76};
     77
     78&emac {
     79	phy-handle = <&int_mii_phy>;
     80	phy-mode = "mii";
     81	allwinner,leds-active-low;
     82	status = "okay";
     83};
     84
     85&ir {
     86	pinctrl-names = "default";
     87	pinctrl-0 = <&r_ir_rx_pin>;
     88	status = "okay";
     89};
     90
     91&mmc0 {
     92	vmmc-supply = <&reg_vcc3v3>;
     93	bus-width = <4>;
     94	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
     95	status = "okay";
     96};
     97
     98&mmc2 {
     99	pinctrl-names = "default";
    100	pinctrl-0 = <&mmc2_8bit_pins>;
    101	vmmc-supply = <&reg_vcc3v3>;
    102	bus-width = <8>;
    103	non-removable;
    104	cap-mmc-hw-reset;
    105	status = "okay";
    106};
    107
    108&ohci1 {
    109	status = "okay";
    110};
    111
    112&ohci2 {
    113	status = "okay";
    114};
    115
    116&ohci3 {
    117	status = "okay";
    118};
    119
    120&uart0 {
    121	pinctrl-names = "default";
    122	pinctrl-0 = <&uart0_pa_pins>;
    123	status = "okay";
    124};
    125
    126&uart1 {
    127	pinctrl-names = "default";
    128	pinctrl-0 = <&uart1_pins>;
    129	status = "disabled";
    130};
    131
    132&uart2 {
    133	pinctrl-names = "default";
    134	pinctrl-0 = <&uart2_pins>;
    135	status = "disabled";
    136};
    137
    138&uart3 {
    139	pinctrl-names = "default";
    140	pinctrl-0 = <&uart3_pins>;
    141	status = "disabled";
    142};
    143
    144&usb_otg {
    145	dr_mode = "peripheral";
    146	status = "okay";
    147};
    148
    149&usbphy {
    150	/* USB VBUS is always on */
    151	status = "okay";
    152};