cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun8i-h3-orangepi-plus.dts (3840B)

      1/*
      2 * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42
     43/* The Orange Pi Plus is an extended version of the Orange Pi 2 */
     44#include "sun8i-h3-orangepi-2.dts"
     45
     46/ {
     47	model = "Xunlong Orange Pi Plus / Plus 2";
     48	compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
     49
     50	aliases {
     51		ethernet0 = &emac;
     52	};
     53
     54	reg_gmac_3v3: gmac-3v3 {
     55		compatible = "regulator-fixed";
     56		regulator-name = "gmac-3v3";
     57		regulator-min-microvolt = <3300000>;
     58		regulator-max-microvolt = <3300000>;
     59		startup-delay-us = <100000>;
     60		enable-active-high;
     61		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
     62	};
     63
     64	reg_usb3_vbus: usb3-vbus {
     65		compatible = "regulator-fixed";
     66		regulator-name = "usb3-vbus";
     67		regulator-min-microvolt = <5000000>;
     68		regulator-max-microvolt = <5000000>;
     69		regulator-boot-on;
     70		enable-active-high;
     71		gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
     72	};
     73};
     74
     75&cpu0 {
     76	cpu-supply = <&reg_vdd_cpux>;
     77};
     78
     79&ehci3 {
     80	status = "okay";
     81};
     82
     83&emac {
     84	pinctrl-names = "default";
     85	pinctrl-0 = <&emac_rgmii_pins>;
     86	phy-supply = <&reg_gmac_3v3>;
     87	phy-handle = <&ext_rgmii_phy>;
     88	phy-mode = "rgmii-id";
     89
     90	status = "okay";
     91};
     92
     93&external_mdio {
     94	ext_rgmii_phy: ethernet-phy@1 {
     95		compatible = "ethernet-phy-ieee802.3-c22";
     96		reg = <0>;
     97	};
     98};
     99
    100&mmc2 {
    101	pinctrl-names = "default";
    102	pinctrl-0 = <&mmc2_8bit_pins>;
    103	vmmc-supply = <&reg_vcc3v3>;
    104	bus-width = <8>;
    105	non-removable;
    106	cap-mmc-hw-reset;
    107	status = "okay";
    108};
    109
    110&mmc2_8bit_pins {
    111	/* Increase drive strength for DDR modes */
    112	drive-strength = <40>;
    113	/* eMMC is missing pull-ups */
    114	bias-pull-up;
    115};
    116
    117&r_i2c {
    118	status = "okay";
    119
    120	reg_vdd_cpux: regulator@65 {
    121		compatible = "silergy,sy8106a";
    122		reg = <0x65>;
    123		regulator-name = "vdd-cpux";
    124		silergy,fixed-microvolt = <1200000>;
    125		regulator-min-microvolt = <1000000>;
    126		regulator-max-microvolt = <1400000>;
    127		regulator-ramp-delay = <200>;
    128		regulator-boot-on;
    129		regulator-always-on;
    130	};
    131};
    132
    133&usbphy {
    134	usb3_vbus-supply = <&reg_usb3_vbus>;
    135};