cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun8i-h3-orangepi-zero-plus2.dts (4351B)

      1/*
      2 * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
      3 * Copyright (C) 2018 Diego Rondini <diego.rondini@kynetics.com>
      4 *
      5 * This file is dual-licensed: you can use it either under the terms
      6 * of the GPL or the X11 license, at your option. Note that this dual
      7 * licensing only applies to this file, and not this project as a
      8 * whole.
      9 *
     10 *  a) This file is free software; you can redistribute it and/or
     11 *     modify it under the terms of the GNU General Public License as
     12 *     published by the Free Software Foundation; either version 2 of the
     13 *     License, or (at your option) any later version.
     14 *
     15 *     This file is distributed in the hope that it will be useful,
     16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18 *     GNU General Public License for more details.
     19 *
     20 * Or, alternatively,
     21 *
     22 *  b) Permission is hereby granted, free of charge, to any person
     23 *     obtaining a copy of this software and associated documentation
     24 *     files (the "Software"), to deal in the Software without
     25 *     restriction, including without limitation the rights to use,
     26 *     copy, modify, merge, publish, distribute, sublicense, and/or
     27 *     sell copies of the Software, and to permit persons to whom the
     28 *     Software is furnished to do so, subject to the following
     29 *     conditions:
     30 *
     31 *     The above copyright notice and this permission notice shall be
     32 *     included in all copies or substantial portions of the Software.
     33 *
     34 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     35 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     36 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     37 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     38 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     39 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     40 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     41 *     OTHER DEALINGS IN THE SOFTWARE.
     42 */
     43
     44/dts-v1/;
     45
     46#include "sun8i-h3.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49
     50/ {
     51	model = "OrangePi Zero Plus2 H3";
     52	compatible = "xunlong,orangepi-zero-plus2-h3", "allwinner,sun8i-h3";
     53
     54	aliases {
     55		serial0 = &uart0;
     56	};
     57
     58	chosen {
     59		stdout-path = "serial0:115200n8";
     60	};
     61
     62	connector {
     63		compatible = "hdmi-connector";
     64		type = "a";
     65
     66		port {
     67			hdmi_con_in: endpoint {
     68				remote-endpoint = <&hdmi_out_con>;
     69			};
     70		};
     71	};
     72
     73	leds {
     74		compatible = "gpio-leds";
     75
     76		led-0 {
     77			label = "orangepi:green:pwr";
     78			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
     79			default-state = "on";
     80		};
     81
     82		led-1 {
     83			label = "orangepi:red:status";
     84			gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
     85		};
     86	};
     87
     88	reg_vcc3v3: vcc3v3 {
     89		compatible = "regulator-fixed";
     90		regulator-name = "vcc3v3";
     91		regulator-min-microvolt = <3300000>;
     92		regulator-max-microvolt = <3300000>;
     93	};
     94
     95	wifi_pwrseq: wifi_pwrseq {
     96		compatible = "mmc-pwrseq-simple";
     97		reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
     98		post-power-on-delay-ms = <200>;
     99	};
    100};
    101
    102&de {
    103	status = "okay";
    104};
    105
    106&ehci0 {
    107	status = "okay";
    108};
    109
    110&hdmi {
    111	status = "okay";
    112};
    113
    114&hdmi_out {
    115	hdmi_out_con: endpoint {
    116		remote-endpoint = <&hdmi_con_in>;
    117	};
    118};
    119
    120&mmc0 {
    121	vmmc-supply = <&reg_vcc3v3>;
    122	bus-width = <4>;
    123	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
    124	status = "okay";
    125};
    126
    127&mmc1 {
    128	vmmc-supply = <&reg_vcc3v3>;
    129	vqmmc-supply = <&reg_vcc3v3>;
    130	mmc-pwrseq = <&wifi_pwrseq>;
    131	bus-width = <4>;
    132	non-removable;
    133	status = "okay";
    134
    135	brcmf: wifi@1 {
    136		reg = <1>;
    137		compatible = "brcm,bcm4329-fmac";
    138		interrupt-parent = <&r_pio>;
    139		interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>;	/* PL7 */
    140		interrupt-names = "host-wake";
    141	};
    142};
    143
    144&mmc2 {
    145	pinctrl-names = "default";
    146	pinctrl-0 = <&mmc2_8bit_pins>;
    147	vmmc-supply = <&reg_vcc3v3>;
    148	bus-width = <8>;
    149	non-removable;
    150	cap-mmc-hw-reset;
    151	status = "okay";
    152};
    153
    154&ohci0 {
    155	status = "okay";
    156};
    157
    158&uart0 {
    159	pinctrl-names = "default";
    160	pinctrl-0 = <&uart0_pa_pins>;
    161	status = "okay";
    162};
    163
    164&usb_otg {
    165	/*
    166	 * According to schematics CN1 MicroUSB port can be used to take
    167	 * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB
    168	 * port cannot provide power externally even if the board is powered
    169	 * via GPIO pins. It thus makes sense to force peripheral mode.
    170	 */
    171	dr_mode = "peripheral";
    172	status = "okay";
    173};
    174
    175&usbphy {
    176	status = "okay";
    177};