cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun8i-h3-rervision-dvk.dts (1560B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
      2/*
      3 * Copyright (C) 2019 Bootlin
      4 * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
      5 */
      6
      7/dts-v1/;
      8#include "sun8i-h3.dtsi"
      9#include "sunxi-common-regulators.dtsi"
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/input/input.h>
     13
     14/ {
     15	model = "RerVision H3-DVK";
     16	compatible = "rervision,h3-dvk", "allwinner,sun8i-h3";
     17
     18	aliases {
     19		ethernet0 = &emac;
     20		serial0 = &uart0;
     21	};
     22
     23	chosen {
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	connector {
     28		compatible = "hdmi-connector";
     29		type = "a";
     30
     31		port {
     32			hdmi_con_in: endpoint {
     33				remote-endpoint = <&hdmi_out_con>;
     34			};
     35		};
     36	};
     37};
     38
     39&de {
     40	status = "okay";
     41};
     42
     43&ehci1 {
     44	status = "okay";
     45};
     46
     47&ehci2 {
     48	status = "okay";
     49};
     50
     51&ehci3 {
     52	status = "okay";
     53};
     54
     55&emac {
     56	phy-handle = <&int_mii_phy>;
     57	phy-mode = "mii";
     58	allwinner,leds-active-low;
     59	status = "okay";
     60};
     61
     62&hdmi {
     63	status = "okay";
     64};
     65
     66&hdmi_out {
     67	hdmi_out_con: endpoint {
     68		remote-endpoint = <&hdmi_con_in>;
     69	};
     70};
     71
     72&mmc0 {
     73	bus-width = <4>;
     74	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
     75	status = "okay";
     76	vmmc-supply = <&reg_vcc3v3>;
     77};
     78
     79&mmc2 {
     80	pinctrl-names = "default";
     81	pinctrl-0 = <&mmc2_8bit_pins>;
     82	vmmc-supply = <&reg_vcc3v3>;
     83	bus-width = <8>;
     84	non-removable;
     85	cap-mmc-hw-reset;
     86	status = "okay";
     87};
     88
     89&ohci1 {
     90	status = "okay";
     91};
     92
     93&ohci2 {
     94	status = "okay";
     95};
     96
     97&ohci3 {
     98	status = "okay";
     99};
    100
    101&uart0 {
    102	pinctrl-names = "default";
    103	pinctrl-0 = <&uart0_pa_pins>;
    104	status = "okay";
    105};
    106
    107&usb_otg {
    108	status = "okay";
    109	dr_mode = "peripheral";
    110};
    111
    112&usbphy {
    113	status = "okay";
    114};