cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

sun8i-q8-common.dtsi (3545B)

      1/*
      2 * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
      3 *
      4 * This file is dual-licensed: you can use it either under the terms
      5 * of the GPL or the X11 license, at your option. Note that this dual
      6 * licensing only applies to this file, and not this project as a
      7 * whole.
      8 *
      9 *  a) This file is free software; you can redistribute it and/or
     10 *     modify it under the terms of the GNU General Public License as
     11 *     published by the Free Software Foundation; either version 2 of the
     12 *     License, or (at your option) any later version.
     13 *
     14 *     This file is distributed in the hope that it will be useful,
     15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     17 *     GNU General Public License for more details.
     18 *
     19 * Or, alternatively,
     20 *
     21 *  b) Permission is hereby granted, free of charge, to any person
     22 *     obtaining a copy of this software and associated documentation
     23 *     files (the "Software"), to deal in the Software without
     24 *     restriction, including without limitation the rights to use,
     25 *     copy, modify, merge, publish, distribute, sublicense, and/or
     26 *     sell copies of the Software, and to permit persons to whom the
     27 *     Software is furnished to do so, subject to the following
     28 *     conditions:
     29 *
     30 *     The above copyright notice and this permission notice shall be
     31 *     included in all copies or substantial portions of the Software.
     32 *
     33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     40 *     OTHER DEALINGS IN THE SOFTWARE.
     41 */
     42#include "sunxi-reference-design-tablet.dtsi"
     43#include "sun8i-reference-design-tablet.dtsi"
     44
     45/ {
     46	aliases {
     47		serial0 = &r_uart;
     48		/* Make u-boot set mac-address for wifi without an eeprom */
     49		ethernet0 = &sdio_wifi;
     50	};
     51
     52	panel: panel {
     53		/* Tablet dts should provide panel compatible */
     54		backlight = <&backlight>;
     55		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
     56		power-supply = <&reg_dc1sw>;
     57
     58		port {
     59			panel_input: endpoint {
     60				remote-endpoint = <&tcon0_out_lcd>;
     61			};
     62		};
     63	};
     64
     65	wifi_pwrseq: wifi_pwrseq {
     66		compatible = "mmc-pwrseq-simple";
     67		/*
     68		 * Q8 boards use various PL# pins as wifi-en. On other boards
     69		 * these may be connected to a wifi module output pin. To avoid
     70		 * short-circuits we configure these as inputs with pull-ups via
     71		 * pinctrl, instead of listing them as active-low reset-gpios.
     72		 */
     73		pinctrl-names = "default";
     74		pinctrl-0 = <&wifi_pwrseq_pin_q8>;
     75		/* The esp8089 needs 200 ms after driving wifi-en high */
     76		post-power-on-delay-ms = <200>;
     77	};
     78};
     79
     80&de {
     81	status = "okay";
     82};
     83
     84&ehci0 {
     85	status  = "okay";
     86};
     87
     88&mmc1 {
     89	pinctrl-names = "default";
     90	pinctrl-0 = <&mmc1_pg_pins>;
     91	vmmc-supply = <&reg_dldo1>;
     92	mmc-pwrseq = <&wifi_pwrseq>;
     93	bus-width = <4>;
     94	non-removable;
     95	status = "okay";
     96
     97	sdio_wifi: sdio_wifi@1 {
     98		reg = <1>;
     99	};
    100};
    101
    102&r_pio {
    103	wifi_pwrseq_pin_q8: wifi-pwrseq-pins {
    104		pins = "PL6", "PL7", "PL11";
    105		function = "gpio_in";
    106		bias-pull-up;
    107	};
    108};
    109
    110&tcon0 {
    111	pinctrl-names = "default";
    112	pinctrl-0 = <&lcd_rgb666_pins>;
    113	status = "okay";
    114};
    115
    116&usbphy {
    117	usb1_vbus-supply = <&reg_dldo1>;
    118};