cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sun9i-a80-optimus.dts (11635B)


      1/*
      2 * Copyright 2014 Chen-Yu Tsai
      3 *
      4 * Chen-Yu Tsai <wens@csie.org>
      5 *
      6 * This file is dual-licensed: you can use it either under the terms
      7 * of the GPL or the X11 license, at your option. Note that this dual
      8 * licensing only applies to this file, and not this project as a
      9 * whole.
     10 *
     11 *  a) This file is free software; you can redistribute it and/or
     12 *     modify it under the terms of the GNU General Public License as
     13 *     published by the Free Software Foundation; either version 2 of the
     14 *     License, or (at your option) any later version.
     15 *
     16 *     This file is distributed in the hope that it will be useful,
     17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
     18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     19 *     GNU General Public License for more details.
     20 *
     21 * Or, alternatively,
     22 *
     23 *  b) Permission is hereby granted, free of charge, to any person
     24 *     obtaining a copy of this software and associated documentation
     25 *     files (the "Software"), to deal in the Software without
     26 *     restriction, including without limitation the rights to use,
     27 *     copy, modify, merge, publish, distribute, sublicense, and/or
     28 *     sell copies of the Software, and to permit persons to whom the
     29 *     Software is furnished to do so, subject to the following
     30 *     conditions:
     31 *
     32 *     The above copyright notice and this permission notice shall be
     33 *     included in all copies or substantial portions of the Software.
     34 *
     35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
     37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
     39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
     40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     42 *     OTHER DEALINGS IN THE SOFTWARE.
     43 */
     44
     45/dts-v1/;
     46#include "sun9i-a80.dtsi"
     47
     48#include <dt-bindings/gpio/gpio.h>
     49
     50/ {
     51	model = "Merrii A80 Optimus Board";
     52	compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
     53
     54	aliases {
     55		serial0 = &uart0;
     56		serial1 = &uart4;
     57	};
     58
     59	chosen {
     60		stdout-path = "serial0:115200n8";
     61	};
     62
     63	leds {
     64		compatible = "gpio-leds";
     65
     66		/* The LED names match those found on the board */
     67		led2 {
     68			label = "optimus:led2:usr";
     69			gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
     70		};
     71
     72		led3 {
     73			label = "optimus:led3:usr";
     74			gpios = <&r_pio 1 15 GPIO_ACTIVE_HIGH>; /* PM15 */
     75		};
     76
     77		led4 {
     78			label = "optimus:led4:usr";
     79			gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>;
     80		};
     81	};
     82
     83	reg_usb1_vbus: usb1-vbus {
     84		compatible = "regulator-fixed";
     85		regulator-name = "usb1-vbus";
     86		regulator-min-microvolt = <5000000>;
     87		regulator-max-microvolt = <5000000>;
     88		enable-active-high;
     89		gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
     90	};
     91
     92	reg_usb3_vbus: usb3-vbus {
     93		compatible = "regulator-fixed";
     94		regulator-name = "usb3-vbus";
     95		regulator-min-microvolt = <5000000>;
     96		regulator-max-microvolt = <5000000>;
     97		enable-active-high;
     98		gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
     99	};
    100
    101	wifi_pwrseq: wifi-pwrseq {
    102		compatible = "mmc-pwrseq-simple";
    103		clocks = <&ac100_rtc 1>;
    104		clock-names = "ext_clock";
    105		/* enables internal regulator and de-asserts reset */
    106		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
    107	};
    108};
    109
    110&ehci0 {
    111	status = "okay";
    112};
    113
    114&ehci1 {
    115	/* Enable if HSIC peripheral is connected */
    116	status = "disabled";
    117};
    118
    119&ehci2 {
    120	status = "okay";
    121};
    122
    123&gmac {
    124	pinctrl-names = "default";
    125	pinctrl-0 = <&gmac_rgmii_pins>;
    126	phy-handle = <&phy1>;
    127	phy-mode = "rgmii-id";
    128	phy-supply = <&reg_cldo1>;
    129	status = "okay";
    130};
    131
    132&mdio {
    133	phy1: ethernet-phy@1 {
    134		reg = <1>;
    135	};
    136};
    137
    138&mmc0 {
    139	pinctrl-names = "default";
    140	pinctrl-0 = <&mmc0_pins>;
    141	vmmc-supply = <&reg_dcdc1>;
    142	bus-width = <4>;
    143	cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH8 */
    144	status = "okay";
    145};
    146
    147&mmc1 {
    148	pinctrl-names = "default";
    149	pinctrl-0 = <&mmc1_pins>;
    150	vmmc-supply = <&reg_dldo1>;
    151	vqmmc-supply = <&reg_cldo3>;
    152	mmc-pwrseq = <&wifi_pwrseq>;
    153	bus-width = <4>;
    154	non-removable;
    155	status = "okay";
    156};
    157
    158&mmc1_pins {
    159	bias-pull-up;
    160};
    161
    162&mmc2 {
    163	pinctrl-names = "default";
    164	pinctrl-0 = <&mmc2_8bit_pins>;
    165	vmmc-supply = <&reg_dcdc1>;
    166	bus-width = <8>;
    167	non-removable;
    168	cap-mmc-hw-reset;
    169	status = "okay";
    170};
    171
    172&mmc2_8bit_pins {
    173	/* Increase drive strength for DDR modes */
    174	drive-strength = <40>;
    175};
    176
    177&ohci0 {
    178	status = "okay";
    179};
    180
    181&ohci2 {
    182	status = "okay";
    183};
    184
    185&osc32k {
    186	/* osc32k input is from AC100 */
    187	clocks = <&ac100_rtc 0>;
    188};
    189
    190&pio {
    191	vcc-pa-supply = <&reg_ldo_io1>;
    192	vcc-pb-supply = <&reg_aldo2>;
    193	vcc-pc-supply = <&reg_dcdc1>;
    194	vcc-pd-supply = <&reg_dcdc1>;
    195	vcc-pe-supply = <&reg_eldo2>;
    196	vcc-pf-supply = <&reg_dcdc1>;
    197	vcc-pg-supply = <&reg_ldo_io0>;
    198	vcc-ph-supply = <&reg_dcdc1>;
    199};
    200
    201&r_ir {
    202	status = "okay";
    203};
    204
    205&r_pio {
    206	vcc-pl-supply = <&reg_dldo2>;
    207	vcc-pm-supply = <&reg_eldo3>;
    208};
    209
    210&r_rsb {
    211	status = "okay";
    212
    213	axp809: pmic@3a3 {
    214		reg = <0x3a3>;
    215		interrupt-parent = <&nmi_intc>;
    216		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    217
    218		regulators {
    219			reg_aldo1: aldo1 {
    220				/*
    221				 * TODO: This should be handled by the
    222				 * USB PHY driver.
    223				 */
    224				regulator-always-on;
    225				regulator-min-microvolt = <3000000>;
    226				regulator-max-microvolt = <3000000>;
    227				regulator-name = "vcc33-usbh";
    228			};
    229
    230			reg_aldo2: aldo2 {
    231				regulator-min-microvolt = <1800000>;
    232				regulator-max-microvolt = <1800000>;
    233				regulator-name = "vcc-pb-io-cam";
    234			};
    235
    236			aldo3 {
    237				/* unused */
    238			};
    239
    240			reg_dc5ldo: dc5ldo {
    241				regulator-always-on;
    242				regulator-min-microvolt = <800000>;
    243				regulator-max-microvolt = <1100000>;
    244				regulator-name = "vdd-cpus-09-usbh";
    245			};
    246
    247			dc1sw {
    248				/* unused */
    249			};
    250
    251			reg_dcdc1: dcdc1 {
    252				regulator-always-on;
    253				regulator-min-microvolt = <3000000>;
    254				regulator-max-microvolt = <3000000>;
    255				regulator-name = "vcc-3v";
    256			};
    257
    258			reg_dcdc2: dcdc2 {
    259				regulator-min-microvolt = <800000>;
    260				regulator-max-microvolt = <1100000>;
    261				regulator-name = "vdd-gpu";
    262			};
    263
    264			reg_dcdc3: dcdc3 {
    265				regulator-always-on;
    266				regulator-min-microvolt = <800000>;
    267				regulator-max-microvolt = <1100000>;
    268				regulator-name = "vdd-cpua";
    269			};
    270
    271			reg_dcdc4: dcdc4 {
    272				regulator-always-on;
    273				regulator-min-microvolt = <800000>;
    274				regulator-max-microvolt = <1100000>;
    275				regulator-name = "vdd-sys-usb0-hdmi";
    276			};
    277
    278			reg_dcdc5: dcdc5 {
    279				regulator-always-on;
    280				regulator-min-microvolt = <1425000>;
    281				regulator-max-microvolt = <1575000>;
    282				regulator-name = "vcc-dram";
    283			};
    284
    285			reg_dldo1: dldo1 {
    286				/*
    287				 * The WiFi chip supports a wide range
    288				 * (3.0 ~ 4.8V) of voltages, and so does
    289				 * this regulator (3.0 ~ 4.2V), but
    290				 * Allwinner SDK always sets it to 3.3V.
    291				 */
    292				regulator-min-microvolt = <3300000>;
    293				regulator-max-microvolt = <3300000>;
    294				regulator-name = "vcc-wifi";
    295			};
    296
    297			reg_dldo2: dldo2 {
    298				regulator-min-microvolt = <3000000>;
    299				regulator-max-microvolt = <3000000>;
    300				regulator-name = "vcc-pl";
    301			};
    302
    303			reg_eldo1: eldo1 {
    304				regulator-min-microvolt = <1200000>;
    305				regulator-max-microvolt = <1200000>;
    306				regulator-name = "vcc-dvdd-cam";
    307			};
    308
    309			reg_eldo2: eldo2 {
    310				regulator-min-microvolt = <1800000>;
    311				regulator-max-microvolt = <1800000>;
    312				regulator-name = "vcc-pe";
    313			};
    314
    315			reg_eldo3: eldo3 {
    316				regulator-min-microvolt = <3000000>;
    317				regulator-max-microvolt = <3000000>;
    318				regulator-name = "vcc-pm-codec-io1";
    319			};
    320
    321			reg_ldo_io0: ldo_io0 {
    322				regulator-min-microvolt = <3000000>;
    323				regulator-max-microvolt = <3000000>;
    324				regulator-name = "vcc-pg";
    325			};
    326
    327			reg_ldo_io1: ldo_io1 {
    328				regulator-min-microvolt = <2500000>;
    329				regulator-max-microvolt = <2500000>;
    330				regulator-name = "vcc-pa-gmac-2v5";
    331			};
    332
    333			reg_rtc_ldo: rtc_ldo {
    334				regulator-name = "vcc-rtc-vdd1v8-io";
    335			};
    336
    337			sw {
    338				/* unused */
    339			};
    340		};
    341	};
    342
    343	axp806: pmic@745 {
    344		compatible = "x-powers,axp806";
    345		reg = <0x745>;
    346		interrupt-parent = <&nmi_intc>;
    347		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    348		interrupt-controller;
    349		#interrupt-cells = <1>;
    350		bldoin-supply = <&reg_dcdce>;
    351
    352		regulators {
    353			reg_s_aldo1: aldo1 {
    354				regulator-always-on;
    355				regulator-min-microvolt = <3000000>;
    356				regulator-max-microvolt = <3000000>;
    357				regulator-name = "avcc";
    358			};
    359
    360			aldo2 {
    361				/*
    362				 * unused, but use a different name to
    363				 * avoid name clash with axp809's aldo's
    364				 */
    365				regulator-name = "s_aldo2";
    366			};
    367
    368			aldo3 {
    369				/*
    370				 * unused, but use a different name to
    371				 * avoid name clash with axp809's aldo's
    372				 */
    373				regulator-name = "s_aldo3";
    374			};
    375
    376			reg_bldo1: bldo1 {
    377				regulator-always-on;
    378				regulator-min-microvolt = <1700000>;
    379				regulator-max-microvolt = <1900000>;
    380				regulator-name = "vcc18-efuse-adc-display-csi";
    381			};
    382
    383			reg_bldo2: bldo2 {
    384				regulator-always-on;
    385				regulator-min-microvolt = <1700000>;
    386				regulator-max-microvolt = <1900000>;
    387				regulator-name =
    388					"vdd18-drampll-vcc18-pll-cpvdd";
    389			};
    390
    391			bldo3 {
    392				/* unused */
    393			};
    394
    395			reg_bldo4: bldo4 {
    396				regulator-min-microvolt = <1100000>;
    397				regulator-max-microvolt = <1300000>;
    398				regulator-name = "vcc12-hsic";
    399			};
    400
    401			reg_cldo1: cldo1 {
    402				/*
    403				 * This was 3V in the original design, but
    404				 * 3.3V is the recommended supply voltage
    405				 * for the Ethernet PHY.
    406				 */
    407				regulator-min-microvolt = <3300000>;
    408				regulator-max-microvolt = <3300000>;
    409				/*
    410				 * The PHY requires 20ms after all voltages
    411				 * are applied until core logic is ready and
    412				 * 30ms after the reset pin is de-asserted.
    413				 * Set a 100ms delay to account for PMIC
    414				 * ramp time and board traces.
    415				 */
    416				regulator-enable-ramp-delay = <100000>;
    417				regulator-name = "vcc-gmac-phy";
    418			};
    419
    420			reg_cldo2: cldo2 {
    421				regulator-min-microvolt = <2800000>;
    422				regulator-max-microvolt = <2800000>;
    423				regulator-name = "afvcc-cam";
    424			};
    425
    426			reg_cldo3: cldo3 {
    427				regulator-min-microvolt = <3000000>;
    428				regulator-max-microvolt = <3000000>;
    429				regulator-name = "vcc-io-wifi-codec-io2";
    430			};
    431
    432			reg_dcdca: dcdca {
    433				regulator-always-on;
    434				regulator-min-microvolt = <800000>;
    435				regulator-max-microvolt = <1100000>;
    436				regulator-name = "vdd-cpub";
    437			};
    438
    439			reg_dcdcd: dcdcd {
    440				regulator-always-on;
    441				regulator-min-microvolt = <800000>;
    442				regulator-max-microvolt = <1100000>;
    443				regulator-name = "vdd-vpu";
    444			};
    445
    446			reg_dcdce: dcdce {
    447				regulator-always-on;
    448				regulator-min-microvolt = <2100000>;
    449				regulator-max-microvolt = <2100000>;
    450				regulator-name = "vcc-bldo-codec-ldoin";
    451			};
    452
    453			sw {
    454				/*
    455				 * unused, but use a different name to
    456				 * avoid name clash with axp809's sw
    457				 */
    458				regulator-name = "s_sw";
    459			};
    460		};
    461	};
    462
    463	ac100: codec@e89 {
    464		compatible = "x-powers,ac100";
    465		reg = <0xe89>;
    466
    467		ac100_codec: codec {
    468			compatible = "x-powers,ac100-codec";
    469			interrupt-parent = <&r_pio>;
    470			interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
    471			#clock-cells = <0>;
    472			clock-output-names = "4M_adda";
    473		};
    474
    475		ac100_rtc: rtc {
    476			compatible = "x-powers,ac100-rtc";
    477			interrupt-parent = <&nmi_intc>;
    478			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    479			clocks = <&ac100_codec>;
    480			#clock-cells = <1>;
    481			clock-output-names = "cko1_rtc",
    482					     "cko2_rtc",
    483					     "cko3_rtc";
    484		};
    485	};
    486};
    487
    488#include "axp809.dtsi"
    489
    490&uart0 {
    491	pinctrl-names = "default";
    492	pinctrl-0 = <&uart0_ph_pins>;
    493	status = "okay";
    494};
    495
    496&usbphy1 {
    497	phy-supply = <&reg_usb1_vbus>;
    498	status = "okay";
    499};
    500
    501&usbphy2 {
    502	phy-supply = <&reg_bldo4>;
    503	/* Enable if HSIC peripheral is connected */
    504	status = "disabled";
    505};
    506
    507&usbphy3 {
    508	phy-supply = <&reg_usb3_vbus>;
    509	status = "okay";
    510};