cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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suniv-f1c100s-licheepi-nano.dts (973B)

      1// SPDX-License-Identifier: (GPL-2.0+ OR X11)
      2/*
      3 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
      4 */
      5
      6/dts-v1/;
      7#include "suniv-f1c100s.dtsi"
      8
      9/ {
     10	model = "Lichee Pi Nano";
     11	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
     12
     13	aliases {
     14		mmc0 = &mmc0;
     15		serial0 = &uart0;
     16		spi0 = &spi0;
     17	};
     18
     19	chosen {
     20		stdout-path = "serial0:115200n8";
     21	};
     22
     23	reg_vcc3v3: vcc3v3 {
     24		compatible = "regulator-fixed";
     25		regulator-name = "vcc3v3";
     26		regulator-min-microvolt = <3300000>;
     27		regulator-max-microvolt = <3300000>;
     28	};
     29};
     30
     31&mmc0 {
     32	broken-cd;
     33	bus-width = <4>;
     34	disable-wp;
     35	status = "okay";
     36	vmmc-supply = <&reg_vcc3v3>;
     37};
     38
     39&spi0 {
     40	pinctrl-names = "default";
     41	pinctrl-0 = <&spi0_pc_pins>;
     42	status = "okay";
     43
     44	flash@0 {
     45		#address-cells = <1>;
     46		#size-cells = <1>;
     47		compatible = "winbond,w25q128", "jedec,spi-nor";
     48		reg = <0>;
     49		spi-max-frequency = <40000000>;
     50	};
     51};
     52
     53&uart0 {
     54	pinctrl-names = "default";
     55	pinctrl-0 = <&uart0_pe_pins>;
     56	status = "okay";
     57};