cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tegra124-jetson-tk1.dts (57077B)


      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/input/input.h>
      5#include "tegra124.dtsi"
      6
      7#include "tegra124-jetson-tk1-emc.dtsi"
      8
      9/ {
     10	model = "NVIDIA Tegra124 Jetson TK1";
     11	compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
     12
     13	aliases {
     14		rtc0 = "/i2c@7000d000/pmic@40";
     15		rtc1 = "/rtc@7000e000";
     16
     17		/* This order keeps the mapping DB9 connector <-> ttyS0 */
     18		serial0 = &uartd;
     19		serial1 = &uarta;
     20		serial2 = &uartb;
     21	};
     22
     23	chosen {
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	memory@80000000 {
     28		reg = <0x0 0x80000000 0x0 0x80000000>;
     29	};
     30
     31	pcie@1003000 {
     32		status = "okay";
     33
     34		avddio-pex-supply = <&vdd_1v05_run>;
     35		dvddio-pex-supply = <&vdd_1v05_run>;
     36		avdd-pex-pll-supply = <&vdd_1v05_run>;
     37		hvdd-pex-supply = <&vdd_3v3_lp0>;
     38		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
     39		vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
     40		avdd-pll-erefe-supply = <&avdd_1v05_run>;
     41
     42		/* Mini PCIe */
     43		pci@1,0 {
     44			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
     45			phy-names = "pcie-0";
     46			status = "okay";
     47		};
     48
     49		/* Gigabit Ethernet */
     50		pci@2,0 {
     51			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
     52			phy-names = "pcie-0";
     53			status = "okay";
     54		};
     55	};
     56
     57	host1x@50000000 {
     58		hdmi@54280000 {
     59			status = "okay";
     60
     61			hdmi-supply = <&vdd_5v0_hdmi>;
     62			pll-supply = <&vdd_hdmi_pll>;
     63			vdd-supply = <&vdd_3v3_hdmi>;
     64
     65			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
     66			nvidia,hpd-gpio =
     67				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
     68		};
     69	};
     70
     71	cec@70015000 {
     72		status = "okay";
     73	};
     74
     75	gpu@57000000 {
     76		/*
     77		 * Node left disabled on purpose - the bootloader will enable
     78		 * it after having set the VPR up
     79		 */
     80		vdd-supply = <&vdd_gpu>;
     81	};
     82
     83	pinmux: pinmux@70000868 {
     84		pinctrl-names = "boot";
     85		pinctrl-0 = <&state_boot>;
     86
     87		state_boot: pinmux {
     88			clk_32k_out_pa0 {
     89				nvidia,pins = "clk_32k_out_pa0";
     90				nvidia,function = "soc";
     91				nvidia,pull = <TEGRA_PIN_PULL_UP>;
     92				nvidia,tristate = <TEGRA_PIN_ENABLE>;
     93				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     94			};
     95			uart3_cts_n_pa1 {
     96				nvidia,pins = "uart3_cts_n_pa1";
     97				nvidia,function = "gmi";
     98				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     99				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    100				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    101			};
    102			dap2_fs_pa2 {
    103				nvidia,pins = "dap2_fs_pa2";
    104				nvidia,function = "i2s1";
    105				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    106				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    107				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    108			};
    109			dap2_sclk_pa3 {
    110				nvidia,pins = "dap2_sclk_pa3";
    111				nvidia,function = "i2s1";
    112				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    113				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    114				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    115			};
    116			dap2_din_pa4 {
    117				nvidia,pins = "dap2_din_pa4";
    118				nvidia,function = "i2s1";
    119				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    120				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    121				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    122			};
    123			dap2_dout_pa5 {
    124				nvidia,pins = "dap2_dout_pa5";
    125				nvidia,function = "i2s1";
    126				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    127				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    128				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    129			};
    130			sdmmc3_clk_pa6 {
    131				nvidia,pins = "sdmmc3_clk_pa6";
    132				nvidia,function = "sdmmc3";
    133				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    134				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    135				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    136			};
    137			sdmmc3_cmd_pa7 {
    138				nvidia,pins = "sdmmc3_cmd_pa7";
    139				nvidia,function = "sdmmc3";
    140				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    141				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    142				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    143			};
    144			pb0 {
    145				nvidia,pins = "pb0";
    146				nvidia,function = "uartd";
    147				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    148				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    149				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    150			};
    151			pb1 {
    152				nvidia,pins = "pb1";
    153				nvidia,function = "uartd";
    154				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    155				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    156				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    157			};
    158			sdmmc3_dat3_pb4 {
    159				nvidia,pins = "sdmmc3_dat3_pb4";
    160				nvidia,function = "sdmmc3";
    161				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    162				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    163				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    164			};
    165			sdmmc3_dat2_pb5 {
    166				nvidia,pins = "sdmmc3_dat2_pb5";
    167				nvidia,function = "sdmmc3";
    168				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    169				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    170				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    171			};
    172			sdmmc3_dat1_pb6 {
    173				nvidia,pins = "sdmmc3_dat1_pb6";
    174				nvidia,function = "sdmmc3";
    175				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    176				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    177				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    178			};
    179			sdmmc3_dat0_pb7 {
    180				nvidia,pins = "sdmmc3_dat0_pb7";
    181				nvidia,function = "sdmmc3";
    182				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    183				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    184				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    185			};
    186			uart3_rts_n_pc0 {
    187				nvidia,pins = "uart3_rts_n_pc0";
    188				nvidia,function = "gmi";
    189				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    190				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    191				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    192			};
    193			uart2_txd_pc2 {
    194				nvidia,pins = "uart2_txd_pc2";
    195				nvidia,function = "irda";
    196				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    197				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    198				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    199			};
    200			uart2_rxd_pc3 {
    201				nvidia,pins = "uart2_rxd_pc3";
    202				nvidia,function = "irda";
    203				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    204				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    205				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    206			};
    207			gen1_i2c_scl_pc4 {
    208				nvidia,pins = "gen1_i2c_scl_pc4";
    209				nvidia,function = "i2c1";
    210				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    211				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    212				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    213				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
    214			};
    215			gen1_i2c_sda_pc5 {
    216				nvidia,pins = "gen1_i2c_sda_pc5";
    217				nvidia,function = "i2c1";
    218				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    219				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    220				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    221				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
    222			};
    223			pc7 {
    224				nvidia,pins = "pc7";
    225				nvidia,function = "rsvd1";
    226				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    227				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    228				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    229			};
    230			pg0 {
    231				nvidia,pins = "pg0";
    232				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    233				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    234				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    235			};
    236			pg1 {
    237				nvidia,pins = "pg1";
    238				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    239				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    240				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    241			};
    242			pg2 {
    243				nvidia,pins = "pg2";
    244				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    245				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    246				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    247			};
    248			pg3 {
    249				nvidia,pins = "pg3";
    250				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    251				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    252				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    253			};
    254			pg4 {
    255				nvidia,pins = "pg4";
    256				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    257				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    258				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    259			};
    260			pg5 {
    261				nvidia,pins = "pg5";
    262				nvidia,function = "spi4";
    263				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    264				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    265				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    266			};
    267			pg6 {
    268				nvidia,pins = "pg6";
    269				nvidia,function = "spi4";
    270				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    271				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    272				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    273			};
    274			pg7 {
    275				nvidia,pins = "pg7";
    276				nvidia,function = "spi4";
    277				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    278				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    279				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    280			};
    281			ph0 {
    282				nvidia,pins = "ph0";
    283				nvidia,function = "gmi";
    284				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    285				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    286				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    287			};
    288			ph1 {
    289				nvidia,pins = "ph1";
    290				nvidia,function = "pwm1";
    291				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    292				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    293				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    294			};
    295			ph2 {
    296				nvidia,pins = "ph2";
    297				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    298				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    299				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    300			};
    301			ph3 {
    302				nvidia,pins = "ph3";
    303				nvidia,function = "gmi";
    304				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    305				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    306				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    307			};
    308			ph4 {
    309				nvidia,pins = "ph4";
    310				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    311				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    312				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    313			};
    314			ph5 {
    315				nvidia,pins = "ph5";
    316				nvidia,function = "rsvd2";
    317				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    318				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    319				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    320			};
    321			ph6 {
    322				nvidia,pins = "ph6";
    323				nvidia,function = "gmi";
    324				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    325				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    326				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    327			};
    328			ph7 {
    329				nvidia,pins = "ph7";
    330				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    331				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    332				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    333			};
    334			pi0 {
    335				nvidia,pins = "pi0";
    336				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    337				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    338				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    339			};
    340			pi1 {
    341				nvidia,pins = "pi1";
    342				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    343				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    344				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    345			};
    346			pi2 {
    347				nvidia,pins = "pi2";
    348				nvidia,function = "rsvd4";
    349				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    350				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    351				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    352			};
    353			pi3 {
    354				nvidia,pins = "pi3";
    355				nvidia,function = "spi4";
    356				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    357				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    358				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    359			};
    360			pi4 {
    361				nvidia,pins = "pi4";
    362				nvidia,function = "gmi";
    363				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    364				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    365				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    366			};
    367			pi5 {
    368				nvidia,pins = "pi5";
    369				nvidia,function = "rsvd2";
    370				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    371				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    372				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    373			};
    374			pi6 {
    375				nvidia,pins = "pi6";
    376				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    377				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    378				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    379			};
    380			pi7 {
    381				nvidia,pins = "pi7";
    382				nvidia,function = "rsvd1";
    383				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    384				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    385				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    386			};
    387			pj0 {
    388				nvidia,pins = "pj0";
    389				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    390				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    391				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    392			};
    393			pj2 {
    394				nvidia,pins = "pj2";
    395				nvidia,function = "rsvd1";
    396				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    397				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    398				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    399			};
    400			uart2_cts_n_pj5 {
    401				nvidia,pins = "uart2_cts_n_pj5";
    402				nvidia,function = "uartb";
    403				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    404				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    405				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    406			};
    407			uart2_rts_n_pj6 {
    408				nvidia,pins = "uart2_rts_n_pj6";
    409				nvidia,function = "uartb";
    410				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    411				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    412				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    413			};
    414			pj7 {
    415				nvidia,pins = "pj7";
    416				nvidia,function = "uartd";
    417				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    418				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    419				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    420			};
    421			pk0 {
    422				nvidia,pins = "pk0";
    423				nvidia,function = "rsvd1";
    424				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    425				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    426				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    427			};
    428			pk1 {
    429				nvidia,pins = "pk1";
    430				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    431				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    432				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    433			};
    434			pk2 {
    435				nvidia,pins = "pk2";
    436				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    437				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    438				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    439			};
    440			pk3 {
    441				nvidia,pins = "pk3";
    442				nvidia,function = "gmi";
    443				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    444				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    445				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    446			};
    447			pk4 {
    448				nvidia,pins = "pk4";
    449				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    450				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    451				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    452			};
    453			spdif_out_pk5 {
    454				nvidia,pins = "spdif_out_pk5";
    455				nvidia,function = "rsvd2";
    456				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    457				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    458				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    459			};
    460			spdif_in_pk6 {
    461				nvidia,pins = "spdif_in_pk6";
    462				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    463				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    464				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    465			};
    466			pk7 {
    467				nvidia,pins = "pk7";
    468				nvidia,function = "uartd";
    469				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    470				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    471				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    472			};
    473			dap1_fs_pn0 {
    474				nvidia,pins = "dap1_fs_pn0";
    475				nvidia,function = "rsvd4";
    476				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    477				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    478				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    479			};
    480			dap1_din_pn1 {
    481				nvidia,pins = "dap1_din_pn1";
    482				nvidia,function = "rsvd4";
    483				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    484				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    485				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    486			};
    487			dap1_dout_pn2 {
    488				nvidia,pins = "dap1_dout_pn2";
    489				nvidia,function = "sata";
    490				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    491				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    492				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    493			};
    494			dap1_sclk_pn3 {
    495				nvidia,pins = "dap1_sclk_pn3";
    496				nvidia,function = "rsvd4";
    497				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    498				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    499				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    500			};
    501			usb_vbus_en0_pn4 {
    502				nvidia,pins = "usb_vbus_en0_pn4";
    503				nvidia,function = "usb";
    504				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    505				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    506				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    507				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    508			};
    509			usb_vbus_en1_pn5 {
    510				nvidia,pins = "usb_vbus_en1_pn5";
    511				nvidia,function = "usb";
    512				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    513				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    514				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    515				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
    516			};
    517			hdmi_int_pn7 {
    518				nvidia,pins = "hdmi_int_pn7";
    519				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    520				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    521				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    522				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
    523			};
    524			ulpi_data7_po0 {
    525				nvidia,pins = "ulpi_data7_po0";
    526				nvidia,function = "ulpi";
    527				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    528				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    529				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    530			};
    531			ulpi_data0_po1 {
    532				nvidia,pins = "ulpi_data0_po1";
    533				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    534				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    535				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    536			};
    537			ulpi_data1_po2 {
    538				nvidia,pins = "ulpi_data1_po2";
    539				nvidia,function = "ulpi";
    540				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    541				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    542				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    543			};
    544			ulpi_data2_po3 {
    545				nvidia,pins = "ulpi_data2_po3";
    546				nvidia,function = "ulpi";
    547				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    548				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    549				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    550			};
    551			ulpi_data3_po4 {
    552				nvidia,pins = "ulpi_data3_po4";
    553				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    554				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    555				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    556			};
    557			ulpi_data4_po5 {
    558				nvidia,pins = "ulpi_data4_po5";
    559				nvidia,function = "ulpi";
    560				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    561				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    562				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    563			};
    564			ulpi_data5_po6 {
    565				nvidia,pins = "ulpi_data5_po6";
    566				nvidia,function = "ulpi";
    567				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    568				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    569				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    570			};
    571			ulpi_data6_po7 {
    572				nvidia,pins = "ulpi_data6_po7";
    573				nvidia,function = "ulpi";
    574				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    575				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    576				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    577			};
    578			dap3_fs_pp0 {
    579				nvidia,pins = "dap3_fs_pp0";
    580				nvidia,function = "i2s2";
    581				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    582				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    583				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    584			};
    585			dap3_din_pp1 {
    586				nvidia,pins = "dap3_din_pp1";
    587				nvidia,function = "i2s2";
    588				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    589				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    590				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    591			};
    592			dap3_dout_pp2 {
    593				nvidia,pins = "dap3_dout_pp2";
    594				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    595				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    596				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    597			};
    598			dap3_sclk_pp3 {
    599				nvidia,pins = "dap3_sclk_pp3";
    600				nvidia,function = "rsvd3";
    601				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    602				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    603				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    604			};
    605			dap4_fs_pp4 {
    606				nvidia,pins = "dap4_fs_pp4";
    607				nvidia,function = "rsvd4";
    608				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    609				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    610				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    611			};
    612			dap4_din_pp5 {
    613				nvidia,pins = "dap4_din_pp5";
    614				nvidia,function = "rsvd3";
    615				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    616				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    617				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    618			};
    619			dap4_dout_pp6 {
    620				nvidia,pins = "dap4_dout_pp6";
    621				nvidia,function = "rsvd4";
    622				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    623				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    624				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    625			};
    626			dap4_sclk_pp7 {
    627				nvidia,pins = "dap4_sclk_pp7";
    628				nvidia,function = "rsvd3";
    629				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    630				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    631				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    632			};
    633			kb_col0_pq0 {
    634				nvidia,pins = "kb_col0_pq0";
    635				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    636				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    637				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    638			};
    639			kb_col1_pq1 {
    640				nvidia,pins = "kb_col1_pq1";
    641				nvidia,function = "rsvd2";
    642				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    643				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    644				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    645			};
    646			kb_col2_pq2 {
    647				nvidia,pins = "kb_col2_pq2";
    648				nvidia,function = "rsvd2";
    649				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    650				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    651				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    652			};
    653			kb_col3_pq3 {
    654				nvidia,pins = "kb_col3_pq3";
    655				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    656				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    657				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    658			};
    659			kb_col4_pq4 {
    660				nvidia,pins = "kb_col4_pq4";
    661				nvidia,function = "sdmmc3";
    662				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    663				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    664				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    665			};
    666			kb_col5_pq5 {
    667				nvidia,pins = "kb_col5_pq5";
    668				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    669				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    670				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    671			};
    672			kb_col6_pq6 {
    673				nvidia,pins = "kb_col6_pq6";
    674				nvidia,function = "rsvd2";
    675				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    676				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    677				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    678			};
    679			kb_col7_pq7 {
    680				nvidia,pins = "kb_col7_pq7";
    681				nvidia,function = "rsvd2";
    682				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    683				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    684				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    685			};
    686			kb_row0_pr0 {
    687				nvidia,pins = "kb_row0_pr0";
    688				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    689				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    690				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    691			};
    692			kb_row1_pr1 {
    693				nvidia,pins = "kb_row1_pr1";
    694				nvidia,function = "rsvd2";
    695				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    696				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    697				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    698			};
    699			kb_row2_pr2 {
    700				nvidia,pins = "kb_row2_pr2";
    701				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    702				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    703				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    704			};
    705			kb_row3_pr3 {
    706				nvidia,pins = "kb_row3_pr3";
    707				nvidia,function = "kbc";
    708				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    709				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    710				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    711			};
    712			kb_row4_pr4 {
    713				nvidia,pins = "kb_row4_pr4";
    714				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    715				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    716				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    717			};
    718			kb_row5_pr5 {
    719				nvidia,pins = "kb_row5_pr5";
    720				nvidia,function = "rsvd3";
    721				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    722				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    723				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    724			};
    725			kb_row6_pr6 {
    726				nvidia,pins = "kb_row6_pr6";
    727				nvidia,function = "displaya_alt";
    728				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    729				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    730				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    731			};
    732			kb_row7_pr7 {
    733				nvidia,pins = "kb_row7_pr7";
    734				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    735				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    736				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    737			};
    738			kb_row8_ps0 {
    739				nvidia,pins = "kb_row8_ps0";
    740				nvidia,function = "rsvd2";
    741				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    742				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    743				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    744			};
    745			kb_row9_ps1 {
    746				nvidia,pins = "kb_row9_ps1";
    747				nvidia,function = "uarta";
    748				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    749				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    750				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    751			};
    752			kb_row10_ps2 {
    753				nvidia,pins = "kb_row10_ps2";
    754				nvidia,function = "uarta";
    755				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    756				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    757				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    758			};
    759			kb_row11_ps3 {
    760				nvidia,pins = "kb_row11_ps3";
    761				nvidia,function = "rsvd2";
    762				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    763				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    764				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    765			};
    766			kb_row12_ps4 {
    767				nvidia,pins = "kb_row12_ps4";
    768				nvidia,function = "rsvd2";
    769				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    770				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    771				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    772			};
    773			kb_row13_ps5 {
    774				nvidia,pins = "kb_row13_ps5";
    775				nvidia,function = "rsvd2";
    776				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    777				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    778				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    779			};
    780			kb_row14_ps6 {
    781				nvidia,pins = "kb_row14_ps6";
    782				nvidia,function = "rsvd2";
    783				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    784				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    785				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    786			};
    787			kb_row15_ps7 {
    788				nvidia,pins = "kb_row15_ps7";
    789				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    790				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    791				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    792			};
    793			kb_row16_pt0 {
    794				nvidia,pins = "kb_row16_pt0";
    795				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    796				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    797				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    798			};
    799			kb_row17_pt1 {
    800				nvidia,pins = "kb_row17_pt1";
    801				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    802				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    803				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    804			};
    805			gen2_i2c_scl_pt5 {
    806				nvidia,pins = "gen2_i2c_scl_pt5";
    807				nvidia,function = "i2c2";
    808				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    809				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    810				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    811				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
    812			};
    813			gen2_i2c_sda_pt6 {
    814				nvidia,pins = "gen2_i2c_sda_pt6";
    815				nvidia,function = "i2c2";
    816				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    817				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    818				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    819				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
    820			};
    821			sdmmc4_cmd_pt7 {
    822				nvidia,pins = "sdmmc4_cmd_pt7";
    823				nvidia,function = "sdmmc4";
    824				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    825				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    826				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    827			};
    828			pu0 {
    829				nvidia,pins = "pu0";
    830				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    831				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    832				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    833			};
    834			pu1 {
    835				nvidia,pins = "pu1";
    836				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    837				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    838				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    839			};
    840			pu2 {
    841				nvidia,pins = "pu2";
    842				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    843				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    844				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    845			};
    846			pu3 {
    847				nvidia,pins = "pu3";
    848				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    849				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    850				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    851			};
    852			pu4 {
    853				nvidia,pins = "pu4";
    854				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    855				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    856				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    857			};
    858			pu5 {
    859				nvidia,pins = "pu5";
    860				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    861				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    862				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    863			};
    864			pu6 {
    865				nvidia,pins = "pu6";
    866				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    867				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    868				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    869			};
    870			pv0 {
    871				nvidia,pins = "pv0";
    872				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    873				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    874				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    875			};
    876			pv1 {
    877				nvidia,pins = "pv1";
    878				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    879				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    880				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    881			};
    882			sdmmc3_cd_n_pv2 {
    883				nvidia,pins = "sdmmc3_cd_n_pv2";
    884				nvidia,function = "sdmmc3";
    885				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    886				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    887				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    888			};
    889			sdmmc1_wp_n_pv3 {
    890				nvidia,pins = "sdmmc1_wp_n_pv3";
    891				nvidia,function = "sdmmc1";
    892				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    893				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    894				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    895			};
    896			ddc_scl_pv4 {
    897				nvidia,pins = "ddc_scl_pv4";
    898				nvidia,function = "i2c4";
    899				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    900				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    901				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    902				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
    903			};
    904			ddc_sda_pv5 {
    905				nvidia,pins = "ddc_sda_pv5";
    906				nvidia,function = "i2c4";
    907				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    908				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    909				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    910				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
    911			};
    912			gpio_w2_aud_pw2 {
    913				nvidia,pins = "gpio_w2_aud_pw2";
    914				nvidia,function = "rsvd2";
    915				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    916				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    917				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    918			};
    919			gpio_w3_aud_pw3 {
    920				nvidia,pins = "gpio_w3_aud_pw3";
    921				nvidia,function = "spi6";
    922				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    923				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    924				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    925			};
    926			dap_mclk1_pw4 {
    927				nvidia,pins = "dap_mclk1_pw4";
    928				nvidia,function = "extperiph1";
    929				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    930				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    931				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    932			};
    933			clk2_out_pw5 {
    934				nvidia,pins = "clk2_out_pw5";
    935				nvidia,function = "extperiph2";
    936				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    937				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    938				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    939			};
    940			uart3_txd_pw6 {
    941				nvidia,pins = "uart3_txd_pw6";
    942				nvidia,function = "rsvd2";
    943				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    944				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    945				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    946			};
    947			uart3_rxd_pw7 {
    948				nvidia,pins = "uart3_rxd_pw7";
    949				nvidia,function = "rsvd2";
    950				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    951				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    952				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    953			};
    954			dvfs_pwm_px0 {
    955				nvidia,pins = "dvfs_pwm_px0";
    956				nvidia,function = "cldvfs";
    957				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    958				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    959				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    960			};
    961			gpio_x1_aud_px1 {
    962				nvidia,pins = "gpio_x1_aud_px1";
    963				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    964				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    965				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    966			};
    967			dvfs_clk_px2 {
    968				nvidia,pins = "dvfs_clk_px2";
    969				nvidia,function = "cldvfs";
    970				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    971				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    972				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    973			};
    974			gpio_x3_aud_px3 {
    975				nvidia,pins = "gpio_x3_aud_px3";
    976				nvidia,function = "rsvd4";
    977				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    978				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    979				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    980			};
    981			gpio_x4_aud_px4 {
    982				nvidia,pins = "gpio_x4_aud_px4";
    983				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    984				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    985				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    986			};
    987			gpio_x5_aud_px5 {
    988				nvidia,pins = "gpio_x5_aud_px5";
    989				nvidia,function = "rsvd4";
    990				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    991				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    992				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    993			};
    994			gpio_x6_aud_px6 {
    995				nvidia,pins = "gpio_x6_aud_px6";
    996				nvidia,function = "gmi";
    997				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    998				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    999				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1000			};
   1001			gpio_x7_aud_px7 {
   1002				nvidia,pins = "gpio_x7_aud_px7";
   1003				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1004				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1005				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1006			};
   1007			ulpi_clk_py0 {
   1008				nvidia,pins = "ulpi_clk_py0";
   1009				nvidia,function = "spi1";
   1010				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1011				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1012				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1013			};
   1014			ulpi_dir_py1 {
   1015				nvidia,pins = "ulpi_dir_py1";
   1016				nvidia,function = "spi1";
   1017				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1018				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1019				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1020			};
   1021			ulpi_nxt_py2 {
   1022				nvidia,pins = "ulpi_nxt_py2";
   1023				nvidia,function = "spi1";
   1024				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1025				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1026				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1027			};
   1028			ulpi_stp_py3 {
   1029				nvidia,pins = "ulpi_stp_py3";
   1030				nvidia,function = "spi1";
   1031				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1032				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1033				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1034			};
   1035			sdmmc1_dat3_py4 {
   1036				nvidia,pins = "sdmmc1_dat3_py4";
   1037				nvidia,function = "sdmmc1";
   1038				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1039				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1040				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1041			};
   1042			sdmmc1_dat2_py5 {
   1043				nvidia,pins = "sdmmc1_dat2_py5";
   1044				nvidia,function = "sdmmc1";
   1045				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1046				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1047				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1048			};
   1049			sdmmc1_dat1_py6 {
   1050				nvidia,pins = "sdmmc1_dat1_py6";
   1051				nvidia,function = "sdmmc1";
   1052				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1053				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1054				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1055			};
   1056			sdmmc1_dat0_py7 {
   1057				nvidia,pins = "sdmmc1_dat0_py7";
   1058				nvidia,function = "rsvd2";
   1059				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1060				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1061				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1062			};
   1063			sdmmc1_clk_pz0 {
   1064				nvidia,pins = "sdmmc1_clk_pz0";
   1065				nvidia,function = "rsvd3";
   1066				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1067				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1068				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1069			};
   1070			sdmmc1_cmd_pz1 {
   1071				nvidia,pins = "sdmmc1_cmd_pz1";
   1072				nvidia,function = "sdmmc1";
   1073				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1074				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1075				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1076			};
   1077			pwr_i2c_scl_pz6 {
   1078				nvidia,pins = "pwr_i2c_scl_pz6";
   1079				nvidia,function = "i2cpwr";
   1080				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1081				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1082				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1083				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
   1084			};
   1085			pwr_i2c_sda_pz7 {
   1086				nvidia,pins = "pwr_i2c_sda_pz7";
   1087				nvidia,function = "i2cpwr";
   1088				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1089				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1090				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1091				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
   1092			};
   1093			sdmmc4_dat0_paa0 {
   1094				nvidia,pins = "sdmmc4_dat0_paa0";
   1095				nvidia,function = "sdmmc4";
   1096				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1097				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1098				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1099			};
   1100			sdmmc4_dat1_paa1 {
   1101				nvidia,pins = "sdmmc4_dat1_paa1";
   1102				nvidia,function = "sdmmc4";
   1103				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1104				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1105				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1106			};
   1107			sdmmc4_dat2_paa2 {
   1108				nvidia,pins = "sdmmc4_dat2_paa2";
   1109				nvidia,function = "sdmmc4";
   1110				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1111				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1112				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1113			};
   1114			sdmmc4_dat3_paa3 {
   1115				nvidia,pins = "sdmmc4_dat3_paa3";
   1116				nvidia,function = "sdmmc4";
   1117				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1118				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1119				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1120			};
   1121			sdmmc4_dat4_paa4 {
   1122				nvidia,pins = "sdmmc4_dat4_paa4";
   1123				nvidia,function = "sdmmc4";
   1124				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1125				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1126				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1127			};
   1128			sdmmc4_dat5_paa5 {
   1129				nvidia,pins = "sdmmc4_dat5_paa5";
   1130				nvidia,function = "sdmmc4";
   1131				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1132				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1133				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1134			};
   1135			sdmmc4_dat6_paa6 {
   1136				nvidia,pins = "sdmmc4_dat6_paa6";
   1137				nvidia,function = "sdmmc4";
   1138				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1139				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1140				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1141			};
   1142			sdmmc4_dat7_paa7 {
   1143				nvidia,pins = "sdmmc4_dat7_paa7";
   1144				nvidia,function = "sdmmc4";
   1145				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1146				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1147				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1148			};
   1149			pbb0 {
   1150				nvidia,pins = "pbb0";
   1151				nvidia,function = "vimclk2_alt";
   1152				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1153				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1154				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1155			};
   1156			cam_i2c_scl_pbb1 {
   1157				nvidia,pins = "cam_i2c_scl_pbb1";
   1158				nvidia,function = "i2c3";
   1159				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1160				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1161				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1162				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
   1163			};
   1164			cam_i2c_sda_pbb2 {
   1165				nvidia,pins = "cam_i2c_sda_pbb2";
   1166				nvidia,function = "i2c3";
   1167				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1168				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1169				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1170				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
   1171			};
   1172			pbb3 {
   1173				nvidia,pins = "pbb3";
   1174				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1175				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1176				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1177			};
   1178			pbb4 {
   1179				nvidia,pins = "pbb4";
   1180				nvidia,function = "vgp4";
   1181				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1182				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1183				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1184			};
   1185			pbb5 {
   1186				nvidia,pins = "pbb5";
   1187				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1188				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1189				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1190			};
   1191			pbb6 {
   1192				nvidia,pins = "pbb6";
   1193				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1194				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1195				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1196			};
   1197			pbb7 {
   1198				nvidia,pins = "pbb7";
   1199				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1200				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1201				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1202			};
   1203			cam_mclk_pcc0 {
   1204				nvidia,pins = "cam_mclk_pcc0";
   1205				nvidia,function = "vi_alt3";
   1206				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1207				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1208				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1209			};
   1210			pcc1 {
   1211				nvidia,pins = "pcc1";
   1212				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1213				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1214				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1215			};
   1216			pcc2 {
   1217				nvidia,pins = "pcc2";
   1218				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1219				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1220				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1221			};
   1222			sdmmc4_clk_pcc4 {
   1223				nvidia,pins = "sdmmc4_clk_pcc4";
   1224				nvidia,function = "sdmmc4";
   1225				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1226				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1227				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1228			};
   1229			clk2_req_pcc5 {
   1230				nvidia,pins = "clk2_req_pcc5";
   1231				nvidia,function = "rsvd2";
   1232				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1233				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1234				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1235			};
   1236			pex_l0_rst_n_pdd1 {
   1237				nvidia,pins = "pex_l0_rst_n_pdd1";
   1238				nvidia,function = "pe0";
   1239				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1240				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1241				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1242			};
   1243			pex_l0_clkreq_n_pdd2 {
   1244				nvidia,pins = "pex_l0_clkreq_n_pdd2";
   1245				nvidia,function = "pe0";
   1246				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1247				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1248				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1249			};
   1250			pex_wake_n_pdd3 {
   1251				nvidia,pins = "pex_wake_n_pdd3";
   1252				nvidia,function = "pe";
   1253				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1254				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1255				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1256			};
   1257			pex_l1_rst_n_pdd5 {
   1258				nvidia,pins = "pex_l1_rst_n_pdd5";
   1259				nvidia,function = "pe1";
   1260				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1261				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1262				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1263			};
   1264			pex_l1_clkreq_n_pdd6 {
   1265				nvidia,pins = "pex_l1_clkreq_n_pdd6";
   1266				nvidia,function = "pe1";
   1267				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1268				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1269				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1270			};
   1271			clk3_out_pee0 {
   1272				nvidia,pins = "clk3_out_pee0";
   1273				nvidia,function = "extperiph3";
   1274				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1275				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1276				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1277			};
   1278			clk3_req_pee1 {
   1279				nvidia,pins = "clk3_req_pee1";
   1280				nvidia,function = "rsvd2";
   1281				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1282				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1283				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1284			};
   1285			dap_mclk1_req_pee2 {
   1286				nvidia,pins = "dap_mclk1_req_pee2";
   1287				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1288				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1289				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1290			};
   1291			hdmi_cec_pee3 {
   1292				nvidia,pins = "hdmi_cec_pee3";
   1293				nvidia,function = "cec";
   1294				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1295				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1296				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1297				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1298			};
   1299			sdmmc3_clk_lb_out_pee4 {
   1300				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
   1301				nvidia,function = "sdmmc3";
   1302				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1303				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1304				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1305			};
   1306			sdmmc3_clk_lb_in_pee5 {
   1307				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
   1308				nvidia,function = "sdmmc3";
   1309				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1310				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1311				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1312			};
   1313			dp_hpd_pff0 {
   1314				nvidia,pins = "dp_hpd_pff0";
   1315				nvidia,function = "dp";
   1316				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1317				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1318				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1319			};
   1320			usb_vbus_en2_pff1 {
   1321				nvidia,pins = "usb_vbus_en2_pff1";
   1322				nvidia,function = "rsvd2";
   1323				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1324				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1325				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1326				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1327			};
   1328			pff2 {
   1329				nvidia,pins = "pff2";
   1330				nvidia,function = "rsvd2";
   1331				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
   1332				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1333				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1334				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
   1335			};
   1336			core_pwr_req {
   1337				nvidia,pins = "core_pwr_req";
   1338				nvidia,function = "pwron";
   1339				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1340				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1341				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1342			};
   1343			cpu_pwr_req {
   1344				nvidia,pins = "cpu_pwr_req";
   1345				nvidia,function = "cpu";
   1346				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1347				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1348				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1349			};
   1350			pwr_int_n {
   1351				nvidia,pins = "pwr_int_n";
   1352				nvidia,function = "pmi";
   1353				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1354				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1355				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1356			};
   1357			reset_out_n {
   1358				nvidia,pins = "reset_out_n";
   1359				nvidia,function = "reset_out_n";
   1360				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1361				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1362				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1363			};
   1364			clk_32k_in {
   1365				nvidia,pins = "clk_32k_in";
   1366				nvidia,function = "clk";
   1367				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
   1368				nvidia,tristate = <TEGRA_PIN_ENABLE>;
   1369				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
   1370			};
   1371			jtag_rtck {
   1372				nvidia,pins = "jtag_rtck";
   1373				nvidia,function = "rtck";
   1374				nvidia,pull = <TEGRA_PIN_PULL_UP>;
   1375				nvidia,tristate = <TEGRA_PIN_DISABLE>;
   1376				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
   1377			};
   1378			dsi_b {
   1379				nvidia,pins = "mipi_pad_ctrl_dsi_b";
   1380				nvidia,function = "dsi_b";
   1381			};
   1382		};
   1383	};
   1384
   1385	/*
   1386	 * First high speed UART, exposed on the expansion connector J3A2
   1387	 *   Pin 41: BR_UART1_TXD
   1388	 *   Pin 44: BR_UART1_RXD
   1389	 */
   1390	serial@70006000 {
   1391		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
   1392		/delete-property/ reg-shift;
   1393		status = "okay";
   1394	};
   1395
   1396	/*
   1397	 * Second high speed UART, exposed on the expansion connector J3A2
   1398	 *   Pin 65: UART2_RXD
   1399	 *   Pin 68: UART2_TXD
   1400	 *   Pin 71: UART2_CTS_L
   1401	 *   Pin 74: UART2_RTS_L
   1402	 */
   1403	serial@70006040 {
   1404		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
   1405		/delete-property/ reg-shift;
   1406		status = "okay";
   1407	};
   1408
   1409	/* DB9 serial port */
   1410	serial@70006300 {
   1411		status = "okay";
   1412	};
   1413
   1414	/* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
   1415	i2c@7000c000 {
   1416		status = "okay";
   1417		clock-frequency = <100000>;
   1418
   1419		rt5639: audio-codec@1c {
   1420			compatible = "realtek,rt5639";
   1421			reg = <0x1c>;
   1422			interrupt-parent = <&gpio>;
   1423			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
   1424			realtek,ldo1-en-gpios =
   1425				<&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
   1426		};
   1427
   1428		temperature-sensor@4c {
   1429			compatible = "ti,tmp451";
   1430			reg = <0x4c>;
   1431			interrupt-parent = <&gpio>;
   1432			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
   1433		};
   1434
   1435		eeprom@56 {
   1436			compatible = "atmel,24c02";
   1437			reg = <0x56>;
   1438			pagesize = <8>;
   1439		};
   1440	};
   1441
   1442	/* Expansion GEN2_I2C_* */
   1443	i2c@7000c400 {
   1444		status = "okay";
   1445		clock-frequency = <100000>;
   1446	};
   1447
   1448	/* Expansion CAM_I2C_* */
   1449	i2c@7000c500 {
   1450		status = "okay";
   1451		clock-frequency = <100000>;
   1452	};
   1453
   1454	/* HDMI DDC */
   1455	hdmi_ddc: i2c@7000c700 {
   1456		status = "okay";
   1457		clock-frequency = <100000>;
   1458	};
   1459
   1460	/* Expansion PWR_I2C_*, on-board components */
   1461	i2c@7000d000 {
   1462		status = "okay";
   1463		clock-frequency = <400000>;
   1464
   1465		pmic: pmic@40 {
   1466			compatible = "ams,as3722";
   1467			reg = <0x40>;
   1468			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
   1469
   1470			ams,system-power-controller;
   1471
   1472			#interrupt-cells = <2>;
   1473			interrupt-controller;
   1474
   1475			gpio-controller;
   1476			#gpio-cells = <2>;
   1477
   1478			pinctrl-names = "default";
   1479			pinctrl-0 = <&as3722_default>;
   1480
   1481			as3722_default: pinmux {
   1482				gpio0 {
   1483					pins = "gpio0";
   1484					function = "gpio";
   1485					bias-pull-down;
   1486				};
   1487
   1488				gpio1_2_4_7 {
   1489					pins = "gpio1", "gpio2", "gpio4", "gpio7";
   1490					function = "gpio";
   1491					bias-pull-up;
   1492				};
   1493
   1494				gpio3_5_6 {
   1495					pins = "gpio3", "gpio5", "gpio6";
   1496					bias-high-impedance;
   1497				};
   1498			};
   1499
   1500			regulators {
   1501				vsup-sd2-supply = <&vdd_5v0_sys>;
   1502				vsup-sd3-supply = <&vdd_5v0_sys>;
   1503				vsup-sd4-supply = <&vdd_5v0_sys>;
   1504				vsup-sd5-supply = <&vdd_5v0_sys>;
   1505				vin-ldo0-supply = <&vdd_1v35_lp0>;
   1506				vin-ldo1-6-supply = <&vdd_3v3_run>;
   1507				vin-ldo2-5-7-supply = <&vddio_1v8>;
   1508				vin-ldo3-4-supply = <&vdd_3v3_sys>;
   1509				vin-ldo9-10-supply = <&vdd_5v0_sys>;
   1510				vin-ldo11-supply = <&vdd_3v3_run>;
   1511
   1512				vdd_cpu: sd0 {
   1513					regulator-name = "+VDD_CPU_AP";
   1514					regulator-min-microvolt = <700000>;
   1515					regulator-max-microvolt = <1400000>;
   1516					regulator-min-microamp = <3500000>;
   1517					regulator-max-microamp = <3500000>;
   1518					regulator-always-on;
   1519					regulator-boot-on;
   1520					ams,ext-control = <2>;
   1521				};
   1522
   1523				sd1 {
   1524					regulator-name = "+VDD_CORE";
   1525					regulator-min-microvolt = <700000>;
   1526					regulator-max-microvolt = <1350000>;
   1527					regulator-min-microamp = <2500000>;
   1528					regulator-max-microamp = <2500000>;
   1529					regulator-always-on;
   1530					regulator-boot-on;
   1531					ams,ext-control = <1>;
   1532				};
   1533
   1534				vdd_1v35_lp0: sd2 {
   1535					regulator-name = "+1.35V_LP0(sd2)";
   1536					regulator-min-microvolt = <1350000>;
   1537					regulator-max-microvolt = <1350000>;
   1538					regulator-always-on;
   1539					regulator-boot-on;
   1540				};
   1541
   1542				sd3 {
   1543					regulator-name = "+1.35V_LP0(sd3)";
   1544					regulator-min-microvolt = <1350000>;
   1545					regulator-max-microvolt = <1350000>;
   1546					regulator-always-on;
   1547					regulator-boot-on;
   1548				};
   1549
   1550				vdd_1v05_run: sd4 {
   1551					regulator-name = "+1.05V_RUN";
   1552					regulator-min-microvolt = <1050000>;
   1553					regulator-max-microvolt = <1050000>;
   1554				};
   1555
   1556				vddio_1v8: sd5 {
   1557					regulator-name = "+1.8V_VDDIO";
   1558					regulator-min-microvolt = <1800000>;
   1559					regulator-max-microvolt = <1800000>;
   1560					regulator-boot-on;
   1561					regulator-always-on;
   1562				};
   1563
   1564				vdd_gpu: sd6 {
   1565					regulator-name = "+VDD_GPU_AP";
   1566					regulator-min-microvolt = <650000>;
   1567					regulator-max-microvolt = <1200000>;
   1568					regulator-min-microamp = <3500000>;
   1569					regulator-max-microamp = <3500000>;
   1570					regulator-boot-on;
   1571					regulator-always-on;
   1572				};
   1573
   1574				avdd_1v05_run: ldo0 {
   1575					regulator-name = "+1.05V_RUN_AVDD";
   1576					regulator-min-microvolt = <1050000>;
   1577					regulator-max-microvolt = <1050000>;
   1578					regulator-boot-on;
   1579					regulator-always-on;
   1580					ams,ext-control = <1>;
   1581				};
   1582
   1583				ldo1 {
   1584					regulator-name = "+1.8V_RUN_CAM";
   1585					regulator-min-microvolt = <1800000>;
   1586					regulator-max-microvolt = <1800000>;
   1587				};
   1588
   1589				ldo2 {
   1590					regulator-name = "+1.2V_GEN_AVDD";
   1591					regulator-min-microvolt = <1200000>;
   1592					regulator-max-microvolt = <1200000>;
   1593					regulator-boot-on;
   1594					regulator-always-on;
   1595				};
   1596
   1597				ldo3 {
   1598					regulator-name = "+1.05V_LP0_VDD_RTC";
   1599					regulator-min-microvolt = <1000000>;
   1600					regulator-max-microvolt = <1000000>;
   1601					regulator-boot-on;
   1602					regulator-always-on;
   1603					ams,enable-tracking;
   1604				};
   1605
   1606				ldo4 {
   1607					regulator-name = "+2.8V_RUN_CAM";
   1608					regulator-min-microvolt = <2800000>;
   1609					regulator-max-microvolt = <2800000>;
   1610				};
   1611
   1612				ldo5 {
   1613					regulator-name = "+1.2V_RUN_CAM_FRONT";
   1614					regulator-min-microvolt = <1200000>;
   1615					regulator-max-microvolt = <1200000>;
   1616				};
   1617
   1618				vddio_sdmmc3: ldo6 {
   1619					regulator-name = "+VDDIO_SDMMC3";
   1620					regulator-min-microvolt = <1800000>;
   1621					regulator-max-microvolt = <3300000>;
   1622				};
   1623
   1624				ldo7 {
   1625					regulator-name = "+1.05V_RUN_CAM_REAR";
   1626					regulator-min-microvolt = <1050000>;
   1627					regulator-max-microvolt = <1050000>;
   1628				};
   1629
   1630				ldo9 {
   1631					regulator-name = "+3.3V_RUN_TOUCH";
   1632					regulator-min-microvolt = <2800000>;
   1633					regulator-max-microvolt = <2800000>;
   1634				};
   1635
   1636				ldo10 {
   1637					regulator-name = "+2.8V_RUN_CAM_AF";
   1638					regulator-min-microvolt = <2800000>;
   1639					regulator-max-microvolt = <2800000>;
   1640				};
   1641
   1642				ldo11 {
   1643					regulator-name = "+1.8V_RUN_VPP_FUSE";
   1644					regulator-min-microvolt = <1800000>;
   1645					regulator-max-microvolt = <1800000>;
   1646				};
   1647			};
   1648		};
   1649	};
   1650
   1651	/* Expansion TS_SPI_* */
   1652	spi@7000d400 {
   1653		status = "okay";
   1654	};
   1655
   1656	/* Internal SPI */
   1657	spi@7000da00 {
   1658		status = "okay";
   1659		spi-max-frequency = <25000000>;
   1660
   1661		flash@0 {
   1662			compatible = "winbond,w25q32dw", "jedec,spi-nor";
   1663			reg = <0>;
   1664			spi-max-frequency = <20000000>;
   1665		};
   1666	};
   1667
   1668	pmc@7000e400 {
   1669		nvidia,invert-interrupt;
   1670		nvidia,suspend-mode = <1>;
   1671		nvidia,cpu-pwr-good-time = <500>;
   1672		nvidia,cpu-pwr-off-time = <300>;
   1673		nvidia,core-pwr-good-time = <641 3845>;
   1674		nvidia,core-pwr-off-time = <61036>;
   1675		nvidia,core-power-req-active-high;
   1676		nvidia,sys-clock-req-active-high;
   1677
   1678		i2c-thermtrip {
   1679			nvidia,i2c-controller-id = <4>;
   1680			nvidia,bus-addr = <0x40>;
   1681			nvidia,reg-addr = <0x36>;
   1682			nvidia,reg-data = <0x2>;
   1683		};
   1684	};
   1685
   1686	/* Serial ATA */
   1687	sata@70020000 {
   1688		status = "okay";
   1689
   1690		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
   1691		phy-names = "sata-0";
   1692
   1693		hvdd-supply = <&vdd_3v3_lp0>;
   1694		vddio-supply = <&vdd_1v05_run>;
   1695		avdd-supply = <&vdd_1v05_run>;
   1696
   1697		target-5v-supply = <&vdd_5v0_sata>;
   1698		target-12v-supply = <&vdd_12v0_sata>;
   1699	};
   1700
   1701	hda@70030000 {
   1702		status = "okay";
   1703	};
   1704
   1705	usb@70090000 {
   1706		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* Micro A/B */
   1707		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Mini PCIe */
   1708		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* USB3 */
   1709		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; /* USB3 */
   1710		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
   1711
   1712		avddio-pex-supply = <&vdd_1v05_run>;
   1713		dvddio-pex-supply = <&vdd_1v05_run>;
   1714		avdd-usb-supply = <&vdd_3v3_lp0>;
   1715		avdd-pll-utmip-supply = <&vddio_1v8>;
   1716		avdd-pll-erefe-supply = <&avdd_1v05_run>;
   1717		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
   1718		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
   1719		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
   1720
   1721		status = "okay";
   1722	};
   1723
   1724	padctl@7009f000 {
   1725		status = "okay";
   1726
   1727		avdd-pll-utmip-supply = <&vddio_1v8>;
   1728		avdd-pll-erefe-supply = <&avdd_1v05_run>;
   1729		avdd-pex-pll-supply = <&vdd_1v05_run>;
   1730		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
   1731
   1732		pads {
   1733			usb2 {
   1734				status = "okay";
   1735
   1736				lanes {
   1737					usb2-0 {
   1738						nvidia,function = "snps";
   1739						status = "okay";
   1740					};
   1741
   1742					usb2-1 {
   1743						nvidia,function = "xusb";
   1744						status = "okay";
   1745					};
   1746
   1747					usb2-2 {
   1748						nvidia,function = "xusb";
   1749						status = "okay";
   1750					};
   1751				};
   1752			};
   1753
   1754			pcie {
   1755				status = "okay";
   1756
   1757				lanes {
   1758					pcie-0 {
   1759						nvidia,function = "usb3-ss";
   1760						status = "okay";
   1761					};
   1762
   1763					pcie-2 {
   1764						nvidia,function = "pcie";
   1765						status = "okay";
   1766					};
   1767
   1768					pcie-4 {
   1769						nvidia,function = "pcie";
   1770						status = "okay";
   1771					};
   1772				};
   1773			};
   1774
   1775			sata {
   1776				status = "okay";
   1777
   1778				lanes {
   1779					sata-0 {
   1780						nvidia,function = "sata";
   1781						status = "okay";
   1782					};
   1783				};
   1784			};
   1785		};
   1786
   1787		ports {
   1788			/* Micro A/B */
   1789			usb2-0 {
   1790				status = "okay";
   1791				mode = "host";
   1792			};
   1793
   1794			/* Mini PCIe */
   1795			usb2-1 {
   1796				status = "okay";
   1797				mode = "host";
   1798			};
   1799
   1800			/* USB3 */
   1801			usb2-2 {
   1802				status = "okay";
   1803				mode = "host";
   1804
   1805				vbus-supply = <&vdd_usb3_vbus>;
   1806			};
   1807
   1808			usb3-0 {
   1809				nvidia,usb2-companion = <2>;
   1810				status = "okay";
   1811			};
   1812		};
   1813	};
   1814
   1815	/* SD card */
   1816	mmc@700b0400 {
   1817		status = "okay";
   1818		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
   1819		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
   1820		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
   1821		bus-width = <4>;
   1822		vqmmc-supply = <&vddio_sdmmc3>;
   1823	};
   1824
   1825	/* eMMC */
   1826	mmc@700b0600 {
   1827		status = "okay";
   1828		bus-width = <8>;
   1829		non-removable;
   1830	};
   1831
   1832	/* CPU DFLL clock */
   1833	clock@70110000 {
   1834		status = "okay";
   1835		vdd-cpu-supply = <&vdd_cpu>;
   1836		nvidia,i2c-fs-rate = <400000>;
   1837	};
   1838
   1839	ahub@70300000 {
   1840		i2s@70301100 {
   1841			status = "okay";
   1842		};
   1843	};
   1844
   1845	usb@7d000000 {
   1846		compatible = "nvidia,tegra124-udc";
   1847		status = "okay";
   1848		dr_mode = "peripheral";
   1849	};
   1850
   1851	usb-phy@7d000000 {
   1852		status = "okay";
   1853	};
   1854
   1855	/* mini-PCIe USB */
   1856	usb@7d004000 {
   1857		status = "okay";
   1858	};
   1859
   1860	usb-phy@7d004000 {
   1861		status = "okay";
   1862	};
   1863
   1864	/* USB A connector */
   1865	usb@7d008000 {
   1866		status = "okay";
   1867	};
   1868
   1869	usb-phy@7d008000 {
   1870		status = "okay";
   1871		vbus-supply = <&vdd_usb3_vbus>;
   1872	};
   1873
   1874	clk32k_in: clock-32k {
   1875		compatible = "fixed-clock";
   1876		clock-frequency = <32768>;
   1877		#clock-cells = <0>;
   1878	};
   1879
   1880	cpus {
   1881		cpu@0 {
   1882			vdd-cpu-supply = <&vdd_cpu>;
   1883		};
   1884	};
   1885
   1886	gpio-keys {
   1887		compatible = "gpio-keys";
   1888
   1889		power {
   1890			label = "Power";
   1891			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
   1892			linux,code = <KEY_POWER>;
   1893			debounce-interval = <10>;
   1894			wakeup-source;
   1895		};
   1896	};
   1897
   1898	vdd_mux: regulator-mux {
   1899		compatible = "regulator-fixed";
   1900		regulator-name = "+VDD_MUX";
   1901		regulator-min-microvolt = <12000000>;
   1902		regulator-max-microvolt = <12000000>;
   1903		regulator-always-on;
   1904		regulator-boot-on;
   1905	};
   1906
   1907	vdd_5v0_sys: regulator-5v0sys {
   1908		compatible = "regulator-fixed";
   1909		regulator-name = "+5V_SYS";
   1910		regulator-min-microvolt = <5000000>;
   1911		regulator-max-microvolt = <5000000>;
   1912		regulator-always-on;
   1913		regulator-boot-on;
   1914		vin-supply = <&vdd_mux>;
   1915	};
   1916
   1917	vdd_3v3_sys: regulator-3v3sys {
   1918		compatible = "regulator-fixed";
   1919		regulator-name = "+3.3V_SYS";
   1920		regulator-min-microvolt = <3300000>;
   1921		regulator-max-microvolt = <3300000>;
   1922		regulator-always-on;
   1923		regulator-boot-on;
   1924		vin-supply = <&vdd_mux>;
   1925	};
   1926
   1927	vdd_3v3_run: regulator-3v3run {
   1928		compatible = "regulator-fixed";
   1929		regulator-name = "+3.3V_RUN";
   1930		regulator-min-microvolt = <3300000>;
   1931		regulator-max-microvolt = <3300000>;
   1932		regulator-always-on;
   1933		regulator-boot-on;
   1934		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
   1935		enable-active-high;
   1936		vin-supply = <&vdd_3v3_sys>;
   1937	};
   1938
   1939	vdd_3v3_hdmi: regulator-3v3hdmi {
   1940		compatible = "regulator-fixed";
   1941		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
   1942		regulator-min-microvolt = <3300000>;
   1943		regulator-max-microvolt = <3300000>;
   1944		vin-supply = <&vdd_3v3_run>;
   1945	};
   1946
   1947	vdd_usb1_vbus: regulator-usb1 {
   1948		compatible = "regulator-fixed";
   1949		regulator-name = "+USB0_VBUS_SW";
   1950		regulator-min-microvolt = <5000000>;
   1951		regulator-max-microvolt = <5000000>;
   1952		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
   1953		enable-active-high;
   1954		gpio-open-drain;
   1955		vin-supply = <&vdd_5v0_sys>;
   1956	};
   1957
   1958	vdd_usb3_vbus: regulator-usb3 {
   1959		compatible = "regulator-fixed";
   1960		regulator-name = "+5V_USB_HS";
   1961		regulator-min-microvolt = <5000000>;
   1962		regulator-max-microvolt = <5000000>;
   1963		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
   1964		enable-active-high;
   1965		gpio-open-drain;
   1966		vin-supply = <&vdd_5v0_sys>;
   1967	};
   1968
   1969	vdd_3v3_lp0: regulator-lp0 {
   1970		compatible = "regulator-fixed";
   1971		regulator-name = "+3.3V_LP0";
   1972		regulator-min-microvolt = <3300000>;
   1973		regulator-max-microvolt = <3300000>;
   1974		regulator-always-on;
   1975		regulator-boot-on;
   1976		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
   1977		enable-active-high;
   1978		vin-supply = <&vdd_3v3_sys>;
   1979	};
   1980
   1981	vdd_hdmi_pll: regulator-hdmipll {
   1982		compatible = "regulator-fixed";
   1983		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
   1984		regulator-min-microvolt = <1050000>;
   1985		regulator-max-microvolt = <1050000>;
   1986		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
   1987		vin-supply = <&vdd_1v05_run>;
   1988	};
   1989
   1990	vdd_5v0_hdmi: regulator-hdmicon {
   1991		compatible = "regulator-fixed";
   1992		regulator-name = "+5V_HDMI_CON";
   1993		regulator-min-microvolt = <5000000>;
   1994		regulator-max-microvolt = <5000000>;
   1995		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
   1996		enable-active-high;
   1997		vin-supply = <&vdd_5v0_sys>;
   1998	};
   1999
   2000	/* Molex power connector */
   2001	vdd_5v0_sata: regulator-5v0sata {
   2002		compatible = "regulator-fixed";
   2003		regulator-name = "+5V_SATA";
   2004		regulator-min-microvolt = <5000000>;
   2005		regulator-max-microvolt = <5000000>;
   2006		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
   2007		enable-active-high;
   2008		vin-supply = <&vdd_5v0_sys>;
   2009	};
   2010
   2011	vdd_12v0_sata: regulator-12v0sata {
   2012		compatible = "regulator-fixed";
   2013		regulator-name = "+12V_SATA";
   2014		regulator-min-microvolt = <12000000>;
   2015		regulator-max-microvolt = <12000000>;
   2016		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
   2017		enable-active-high;
   2018		vin-supply = <&vdd_mux>;
   2019	};
   2020
   2021	sound {
   2022		compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
   2023			     "nvidia,tegra-audio-rt5640";
   2024		nvidia,model = "NVIDIA Tegra Jetson TK1";
   2025
   2026		nvidia,audio-routing =
   2027			"Headphones", "HPOR",
   2028			"Headphones", "HPOL",
   2029			"Mic Jack", "MICBIAS1",
   2030			"IN2P", "Mic Jack";
   2031
   2032		nvidia,i2s-controller = <&tegra_i2s1>;
   2033		nvidia,audio-codec = <&rt5639>;
   2034
   2035		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
   2036
   2037		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
   2038			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
   2039			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
   2040		clock-names = "pll_a", "pll_a_out0", "mclk";
   2041
   2042		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
   2043				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
   2044
   2045		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
   2046					 <&tegra_car TEGRA124_CLK_EXTERN1>;
   2047	};
   2048
   2049	thermal-zones {
   2050		cpu-thermal {
   2051			trips {
   2052				cpu-shutdown-trip {
   2053					temperature = <101000>;
   2054					hysteresis = <0>;
   2055					type = "critical";
   2056				};
   2057			};
   2058		};
   2059
   2060		mem-thermal {
   2061			trips {
   2062				mem-shutdown-trip {
   2063					temperature = <101000>;
   2064					hysteresis = <0>;
   2065					type = "critical";
   2066				};
   2067			};
   2068		};
   2069
   2070		gpu-thermal {
   2071			trips {
   2072				gpu-shutdown-trip {
   2073					temperature = <101000>;
   2074					hysteresis = <0>;
   2075					type = "critical";
   2076				};
   2077			};
   2078		};
   2079	};
   2080};