cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tegra20-asus-tf101.dts (29415B)


      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include <dt-bindings/input/atmel-maxtouch.h>
      5#include <dt-bindings/input/gpio-keys.h>
      6#include <dt-bindings/input/input.h>
      7#include <dt-bindings/thermal/thermal.h>
      8
      9#include "tegra20.dtsi"
     10#include "tegra20-cpu-opp.dtsi"
     11#include "tegra20-cpu-opp-microvolt.dtsi"
     12
     13/ {
     14	model = "ASUS EeePad Transformer TF101";
     15	compatible = "asus,tf101", "nvidia,tegra20";
     16	chassis-type = "convertible";
     17
     18	aliases {
     19		mmc0 = &sdmmc4; /* eMMC */
     20		mmc1 = &sdmmc3; /* MicroSD */
     21		mmc2 = &sdmmc1; /* WiFi */
     22
     23		rtc0 = &pmic;
     24		rtc1 = "/rtc@7000e000";
     25
     26		serial0 = &uartd;
     27		serial1 = &uartc; /* Bluetooth */
     28		serial2 = &uartb; /* GPS */
     29	};
     30
     31	/*
     32	 * The decompressor and also some bootloaders rely on a
     33	 * pre-existing /chosen node to be available to insert the
     34	 * command line and merge other ATAGS info.
     35	 */
     36	chosen {};
     37
     38	memory@0 {
     39		reg = <0x00000000 0x40000000>;
     40	};
     41
     42	reserved-memory {
     43		#address-cells = <1>;
     44		#size-cells = <1>;
     45		ranges;
     46
     47		ramoops@2ffe0000 {
     48			compatible = "ramoops";
     49			reg = <0x2ffe0000 0x10000>;	/* 64kB */
     50			console-size = <0x8000>;	/* 32kB */
     51			record-size = <0x400>;		/*  1kB */
     52			ecc-size = <16>;
     53		};
     54
     55		linux,cma@30000000 {
     56			compatible = "shared-dma-pool";
     57			alloc-ranges = <0x30000000 0x10000000>;
     58			size = <0x10000000>; /* 256MiB */
     59			linux,cma-default;
     60			reusable;
     61		};
     62	};
     63
     64	host1x@50000000 {
     65		dc@54200000 {
     66			rgb {
     67				status = "okay";
     68
     69				port@0 {
     70					lcd_output: endpoint {
     71						remote-endpoint = <&lvds_encoder_input>;
     72						bus-width = <18>;
     73					};
     74				};
     75			};
     76		};
     77
     78		hdmi@54280000 {
     79			status = "okay";
     80
     81			vdd-supply = <&hdmi_vdd_reg>;
     82			pll-supply = <&hdmi_pll_reg>;
     83			hdmi-supply = <&vdd_hdmi_en>;
     84
     85			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
     86			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
     87				GPIO_ACTIVE_HIGH>;
     88		};
     89	};
     90
     91	gpio@6000d000 {
     92		charging-enable-hog {
     93			gpio-hog;
     94			gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
     95			output-low;
     96		};
     97	};
     98
     99	pinmux@70000014 {
    100		pinctrl-names = "default";
    101		pinctrl-0 = <&state_default>;
    102
    103		state_default: pinmux {
    104			ata {
    105				nvidia,pins = "ata";
    106				nvidia,function = "ide";
    107			};
    108
    109			atb {
    110				nvidia,pins = "atb", "gma", "gme";
    111				nvidia,function = "sdio4";
    112			};
    113
    114			atc {
    115				nvidia,pins = "atc";
    116				nvidia,function = "nand";
    117			};
    118
    119			atd {
    120				nvidia,pins = "atd", "ate", "gmb", "spia",
    121					"spib", "spic";
    122				nvidia,function = "gmi";
    123			};
    124
    125			cdev1 {
    126				nvidia,pins = "cdev1";
    127				nvidia,function = "plla_out";
    128			};
    129
    130			cdev2 {
    131				nvidia,pins = "cdev2";
    132				nvidia,function = "pllp_out4";
    133			};
    134
    135			crtp {
    136				nvidia,pins = "crtp";
    137				nvidia,function = "crt";
    138			};
    139
    140			lm1 {
    141				nvidia,pins = "lm1";
    142				nvidia,function = "rsvd3";
    143			};
    144
    145			csus {
    146				nvidia,pins = "csus";
    147				nvidia,function = "vi_sensor_clk";
    148			};
    149
    150			dap1 {
    151				nvidia,pins = "dap1";
    152				nvidia,function = "dap1";
    153			};
    154
    155			dap2 {
    156				nvidia,pins = "dap2";
    157				nvidia,function = "dap2";
    158			};
    159
    160			dap3 {
    161				nvidia,pins = "dap3";
    162				nvidia,function = "dap3";
    163			};
    164
    165			dap4 {
    166				nvidia,pins = "dap4";
    167				nvidia,function = "dap4";
    168			};
    169
    170			dta {
    171				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
    172				nvidia,function = "vi";
    173			};
    174
    175			dtf {
    176				nvidia,pins = "dtf";
    177				nvidia,function = "i2c3";
    178			};
    179
    180			gmc {
    181				nvidia,pins = "gmc";
    182				nvidia,function = "uartd";
    183			};
    184
    185			gmd {
    186				nvidia,pins = "gmd";
    187				nvidia,function = "sflash";
    188			};
    189
    190			gpu {
    191				nvidia,pins = "gpu";
    192				nvidia,function = "pwm";
    193			};
    194
    195			gpu7 {
    196				nvidia,pins = "gpu7";
    197				nvidia,function = "rtck";
    198			};
    199
    200			gpv {
    201				nvidia,pins = "gpv", "slxa";
    202				nvidia,function = "pcie";
    203			};
    204
    205			hdint {
    206				nvidia,pins = "hdint";
    207				nvidia,function = "hdmi";
    208			};
    209
    210			i2cp {
    211				nvidia,pins = "i2cp";
    212				nvidia,function = "i2cp";
    213			};
    214
    215			irrx {
    216				nvidia,pins = "irrx", "irtx";
    217				nvidia,function = "uartb";
    218			};
    219
    220			kbca {
    221				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
    222					"kbce", "kbcf";
    223				nvidia,function = "kbc";
    224			};
    225
    226			lcsn {
    227				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
    228					"lsdi", "lvp0";
    229				nvidia,function = "rsvd4";
    230			};
    231
    232			ld0 {
    233				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
    234					"ld5", "ld6", "ld7", "ld8", "ld9",
    235					"ld10", "ld11", "ld12", "ld13", "ld14",
    236					"ld15", "ld16", "ld17", "ldi", "lhp0",
    237					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
    238					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
    239					"lspi", "lvp1", "lvs";
    240				nvidia,function = "displaya";
    241			};
    242
    243			owc {
    244				nvidia,pins = "owc", "spdi", "spdo", "uac";
    245				nvidia,function = "rsvd2";
    246			};
    247
    248			pmc {
    249				nvidia,pins = "pmc";
    250				nvidia,function = "pwr_on";
    251			};
    252
    253			rm {
    254				nvidia,pins = "rm";
    255				nvidia,function = "i2c1";
    256			};
    257
    258			sdb {
    259				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
    260				nvidia,function = "sdio3";
    261			};
    262
    263			sdio1 {
    264				nvidia,pins = "sdio1";
    265				nvidia,function = "sdio1";
    266			};
    267
    268			slxd {
    269				nvidia,pins = "slxd";
    270				nvidia,function = "spdif";
    271			};
    272
    273			spid {
    274				nvidia,pins = "spid", "spie", "spif";
    275				nvidia,function = "spi1";
    276			};
    277
    278			spig {
    279				nvidia,pins = "spig", "spih";
    280				nvidia,function = "spi2_alt";
    281			};
    282
    283			uaa {
    284				nvidia,pins = "uaa", "uab", "uda";
    285				nvidia,function = "ulpi";
    286			};
    287
    288			uad {
    289				nvidia,pins = "uad";
    290				nvidia,function = "irda";
    291			};
    292
    293			uca {
    294				nvidia,pins = "uca", "ucb";
    295				nvidia,function = "uartc";
    296			};
    297
    298			conf_ata {
    299				nvidia,pins = "ata", "atb", "atc", "atd",
    300					"cdev1", "cdev2", "dap1", "dap4",
    301					"dte", "ddc", "dtf", "gma", "gmc",
    302					"gme", "gpu", "gpu7", "gpv", "i2cp",
    303					"irrx", "irtx", "pta", "rm", "sdc",
    304					"sdd", "slxc", "slxd", "slxk", "spdi",
    305					"spdo", "uac", "uad",
    306					"uda", "csus";
    307				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    308				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    309			};
    310
    311			conf_ate {
    312				nvidia,pins = "ate", "dap2", "dap3", "gmb", "gmd",
    313					"owc", "spia", "spib", "spic",
    314					"spid", "spie", "spig", "slxa";
    315				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    316				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    317			};
    318
    319			conf_ck32 {
    320				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
    321					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
    322				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    323			};
    324
    325			conf_crtp {
    326				nvidia,pins = "crtp", "spih";
    327				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    328				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    329			};
    330
    331			conf_dta {
    332				nvidia,pins = "dta", "dtb", "dtc", "dtd";
    333				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    334				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    335			};
    336
    337			conf_spif {
    338				nvidia,pins = "spif";
    339				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    340				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    341			};
    342
    343			conf_hdint {
    344				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
    345					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
    346				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    347			};
    348
    349			conf_kbca {
    350				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
    351					"kbce", "kbcf", "sdio1", "uaa", "uab",
    352					"uca", "ucb";
    353				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    354				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    355			};
    356
    357			conf_lc {
    358				nvidia,pins = "lc", "ls";
    359				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    360			};
    361
    362			conf_ld0 {
    363				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
    364					"ld5", "ld6", "ld7", "ld8", "ld9",
    365					"ld10", "ld11", "ld12", "ld13", "ld14",
    366					"ld15", "ld16", "ld17", "ldi", "lhp0",
    367					"lhp1", "lhp2", "lhs", "lm0", "lpp",
    368					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
    369					"lvp1", "lvs", "pmc", "sdb";
    370				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    371			};
    372
    373			conf_ld17_0 {
    374				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
    375					"ld23_22";
    376				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    377			};
    378
    379			drive_sdio1 {
    380				nvidia,pins = "drive_sdio1", "drive_ddc", "drive_vi1";
    381				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
    382				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
    383				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
    384				nvidia,pull-down-strength = <31>;
    385				nvidia,pull-up-strength = <31>;
    386				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
    387				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
    388			};
    389
    390			drive_csus {
    391				nvidia,pins = "drive_csus";
    392				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
    393				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
    394				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
    395				nvidia,pull-down-strength = <31>;
    396				nvidia,pull-up-strength = <31>;
    397				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
    398				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
    399			};
    400		};
    401
    402		state_i2cmux_ddc: pinmux_i2cmux_ddc {
    403			ddc {
    404				nvidia,pins = "ddc";
    405				nvidia,function = "i2c2";
    406			};
    407
    408			pta {
    409				nvidia,pins = "pta";
    410				nvidia,function = "rsvd4";
    411			};
    412		};
    413
    414		state_i2cmux_pta: pinmux_i2cmux_pta {
    415			ddc {
    416				nvidia,pins = "ddc";
    417				nvidia,function = "rsvd4";
    418			};
    419
    420			pta {
    421				nvidia,pins = "pta";
    422				nvidia,function = "i2c2";
    423			};
    424		};
    425
    426		state_i2cmux_idle: pinmux_i2cmux_idle {
    427			ddc {
    428				nvidia,pins = "ddc";
    429				nvidia,function = "rsvd4";
    430			};
    431
    432			pta {
    433				nvidia,pins = "pta";
    434				nvidia,function = "rsvd4";
    435			};
    436		};
    437	};
    438
    439	spdif@70002400 {
    440		status = "okay";
    441
    442		nvidia,fixed-parent-rate;
    443	};
    444
    445	i2s@70002800 {
    446		status = "okay";
    447
    448		nvidia,fixed-parent-rate;
    449	};
    450
    451	serial@70006040 {
    452		compatible = "nvidia,tegra20-hsuart";
    453		/delete-property/ reg-shift;
    454		/* GPS BCM4751 */
    455	};
    456
    457	serial@70006200 {
    458		compatible = "nvidia,tegra20-hsuart";
    459		/delete-property/ reg-shift;
    460		status = "okay";
    461
    462		/* Azurewave AW-NH615 BCM4329B1 */
    463		bluetooth {
    464			compatible = "brcm,bcm4329-bt";
    465
    466			interrupt-parent = <&gpio>;
    467			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
    468			interrupt-names = "host-wakeup";
    469
    470			/* PLLP 216MHz / 16 / 4 */
    471			max-speed = <3375000>;
    472
    473			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
    474			clock-names = "txco";
    475
    476			vbat-supply  = <&vdd_3v3_sys>;
    477			vddio-supply = <&vdd_1v8_sys>;
    478
    479			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
    480			shutdown-gpios =      <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
    481		};
    482	};
    483
    484	serial@70006300 {
    485		status = "okay";
    486	};
    487
    488	pwm@7000a000 {
    489		status = "okay";
    490	};
    491
    492	i2c@7000c000 {
    493		status = "okay";
    494		clock-frequency = <400000>;
    495
    496		/* Aichi AMI306 digital compass */
    497		magnetometer@e {
    498			compatible = "asahi-kasei,ak8974";
    499			reg = <0xe>;
    500
    501			avdd-supply = <&vdd_3v3_sys>;
    502			dvdd-supply = <&vdd_1v8_sys>;
    503
    504			mount-matrix = "-1",  "0",  "0",
    505					"0",  "1",  "0",
    506					"0",  "0", "-1";
    507		};
    508
    509		wm8903: audio-codec@1a {
    510			compatible = "wlf,wm8903";
    511			reg = <0x1a>;
    512
    513			interrupt-parent = <&gpio>;
    514			interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_BOTH>;
    515
    516			gpio-controller;
    517			#gpio-cells = <2>;
    518
    519			micdet-cfg = <0x83>;
    520			micdet-delay = <100>;
    521
    522			gpio-cfg = <
    523				0xffffffff /* don't touch */
    524				0xffffffff /* don't touch */
    525				0x00000000 /* Speaker-enable GPIO, output, low */
    526				0x00000400 /* Mic bias current detect */
    527				0xffffffff /* don't touch */
    528			>;
    529
    530			AVDD-supply  = <&vdd_1v8_sys>;
    531			CPVDD-supply = <&vdd_1v8_sys>;
    532			DBVDD-supply = <&vdd_1v8_sys>;
    533			DCVDD-supply = <&vdd_1v8_sys>;
    534		};
    535
    536		/* Atmel MXT1386 Touchscreen */
    537		touchscreen@5b {
    538			compatible = "atmel,maxtouch";
    539			reg = <0x5b>;
    540
    541			interrupt-parent = <&gpio>;
    542			interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
    543
    544			reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
    545
    546			vdda-supply = <&vdd_3v3_sys>;
    547			vdd-supply  = <&vdd_3v3_sys>;
    548
    549			atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
    550		};
    551
    552		gyroscope@68 {
    553			compatible = "invensense,mpu3050";
    554			reg = <0x68>;
    555
    556			interrupt-parent = <&gpio>;
    557			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
    558
    559			vdd-supply    = <&vdd_3v3_sys>;
    560			vlogic-supply = <&vdd_1v8_sys>;
    561
    562			mount-matrix =	 "0",  "1",  "0",
    563					"-1",  "0",  "0",
    564					 "0",  "0",  "1";
    565
    566			i2c-gate {
    567				#address-cells = <1>;
    568				#size-cells = <0>;
    569
    570				accelerometer@f {
    571					compatible = "kionix,kxtf9";
    572					reg = <0xf>;
    573
    574					interrupt-parent = <&gpio>;
    575					interrupts = <TEGRA_GPIO(N, 4) IRQ_TYPE_EDGE_RISING>;
    576
    577					vdd-supply = <&vdd_1v8_sys>;
    578					vddio-supply = <&vdd_1v8_sys>;
    579
    580					mount-matrix =	 "1",  "0",  "0",
    581							 "0",  "1",  "0",
    582							 "0",  "0",  "1";
    583				};
    584			};
    585		};
    586	};
    587
    588	i2c2: i2c@7000c400 {
    589		status = "okay";
    590		clock-frequency = <100000>;
    591	};
    592
    593	i2c@7000c500 {
    594		status = "okay";
    595		clock-frequency = <400000>;
    596	};
    597
    598	i2c@7000d000 {
    599		status = "okay";
    600		clock-frequency = <400000>;
    601
    602		pmic: pmic@34 {
    603			compatible = "ti,tps6586x";
    604			reg = <0x34>;
    605			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
    606
    607			ti,system-power-controller;
    608
    609			#gpio-cells = <2>;
    610			gpio-controller;
    611
    612			sys-supply = <&vdd_5v0_sys>;
    613			vin-sm0-supply = <&sys_reg>;
    614			vin-sm1-supply = <&sys_reg>;
    615			vin-sm2-supply = <&sys_reg>;
    616			vinldo01-supply = <&sm2_reg>;
    617			vinldo23-supply = <&sm2_reg>;
    618			vinldo4-supply = <&sm2_reg>;
    619			vinldo678-supply = <&sm2_reg>;
    620			vinldo9-supply = <&sm2_reg>;
    621
    622			regulators {
    623				sys_reg: sys {
    624					regulator-name = "vdd_sys";
    625					regulator-always-on;
    626				};
    627
    628				vdd_core: sm0 {
    629					regulator-name = "vdd_sm0,vdd_core";
    630					regulator-min-microvolt = <950000>;
    631					regulator-max-microvolt = <1300000>;
    632					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
    633					regulator-coupled-max-spread = <170000 550000>;
    634					regulator-always-on;
    635					regulator-boot-on;
    636
    637					nvidia,tegra-core-regulator;
    638				};
    639
    640				vdd_cpu: sm1 {
    641					regulator-name = "vdd_sm1,vdd_cpu";
    642					regulator-min-microvolt = <750000>;
    643					regulator-max-microvolt = <1125000>;
    644					regulator-coupled-with = <&vdd_core &rtc_vdd>;
    645					regulator-coupled-max-spread = <550000 550000>;
    646					regulator-always-on;
    647					regulator-boot-on;
    648
    649					nvidia,tegra-cpu-regulator;
    650				};
    651
    652				sm2_reg: sm2 {
    653					regulator-name = "vdd_sm2,vin_ldo*";
    654					regulator-min-microvolt = <3700000>;
    655					regulator-max-microvolt = <3700000>;
    656					regulator-always-on;
    657				};
    658
    659				/* LDO0 is not connected to anything */
    660
    661				ldo1 {
    662					regulator-name = "vdd_ldo1,avdd_pll*";
    663					regulator-min-microvolt = <1100000>;
    664					regulator-max-microvolt = <1100000>;
    665					regulator-always-on;
    666				};
    667
    668				rtc_vdd: ldo2 {
    669					regulator-name = "vdd_ldo2,vdd_rtc";
    670					regulator-min-microvolt = <950000>;
    671					regulator-max-microvolt = <1300000>;
    672					regulator-coupled-with = <&vdd_core &vdd_cpu>;
    673					regulator-coupled-max-spread = <170000 550000>;
    674					regulator-always-on;
    675					regulator-boot-on;
    676
    677					nvidia,tegra-rtc-regulator;
    678				};
    679
    680				ldo3 {
    681					regulator-name = "vdd_ldo3,avdd_usb*";
    682					regulator-min-microvolt = <3300000>;
    683					regulator-max-microvolt = <3300000>;
    684					regulator-always-on;
    685				};
    686
    687				ldo4 {
    688					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
    689					regulator-min-microvolt = <1800000>;
    690					regulator-max-microvolt = <1800000>;
    691					regulator-always-on;
    692				};
    693
    694				vcore_emmc: ldo5 {
    695					regulator-name = "vdd_ldo5,vcore_mmc";
    696					regulator-min-microvolt = <2850000>;
    697					regulator-max-microvolt = <2850000>;
    698					regulator-always-on;
    699				};
    700
    701				ldo6 {
    702					regulator-name = "vdd_ldo6,avdd_vdac";
    703					regulator-min-microvolt = <1800000>;
    704					regulator-max-microvolt = <1800000>;
    705				};
    706
    707				hdmi_vdd_reg: ldo7 {
    708					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
    709					regulator-min-microvolt = <3300000>;
    710					regulator-max-microvolt = <3300000>;
    711				};
    712
    713				hdmi_pll_reg: ldo8 {
    714					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
    715					regulator-min-microvolt = <1800000>;
    716					regulator-max-microvolt = <1800000>;
    717				};
    718
    719				ldo9 {
    720					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
    721					regulator-min-microvolt = <2850000>;
    722					regulator-max-microvolt = <2850000>;
    723					regulator-always-on;
    724				};
    725
    726				ldo_rtc {
    727					regulator-name = "vdd_rtc_out,vdd_cell";
    728					regulator-min-microvolt = <3300000>;
    729					regulator-max-microvolt = <3300000>;
    730					regulator-always-on;
    731				};
    732			};
    733		};
    734
    735		nct1008: temperature-sensor@4c {
    736			compatible = "onnn,nct1008";
    737			reg = <0x4c>;
    738			vcc-supply = <&vdd_3v3_sys>;
    739
    740			interrupt-parent = <&gpio>;
    741			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
    742
    743			#thermal-sensor-cells = <1>;
    744		};
    745	};
    746
    747	pmc@7000e400 {
    748		nvidia,invert-interrupt;
    749		nvidia,suspend-mode = <1>;
    750		nvidia,cpu-pwr-good-time = <2000>;
    751		nvidia,cpu-pwr-off-time = <100>;
    752		nvidia,core-pwr-good-time = <3845 3845>;
    753		nvidia,core-pwr-off-time = <458>;
    754		nvidia,sys-clock-req-active-high;
    755		core-supply = <&vdd_core>;
    756	};
    757
    758	memory-controller@7000f400 {
    759		nvidia,use-ram-code;
    760
    761		emc-tables@3 {
    762			reg = <0x3>;
    763
    764			#address-cells = <1>;
    765			#size-cells = <0>;
    766
    767			lpddr2 {
    768				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
    769				revision-id = <1 0>;
    770				density = <2048>;
    771				io-width = <16>;
    772			};
    773
    774			emc-table@25000 {
    775				reg = <25000>;
    776				compatible = "nvidia,tegra20-emc-table";
    777				clock-frequency = <25000>;
    778				nvidia,emc-registers = <0x00000002 0x00000006
    779					0x00000003 0x00000003 0x00000006 0x00000004
    780					0x00000002 0x00000009 0x00000003 0x00000003
    781					0x00000002 0x00000002 0x00000002 0x00000004
    782					0x00000003 0x00000008 0x0000000b 0x0000004d
    783					0x00000000 0x00000003 0x00000003 0x00000003
    784					0x00000008 0x00000001 0x0000000a 0x00000004
    785					0x00000003 0x00000008 0x00000004 0x00000006
    786					0x00000002 0x00000068 0x00000000 0x00000003
    787					0x00000000 0x00000000 0x00000282 0xa0ae04ae
    788					0x00070000 0x00000000 0x00000000 0x00000003
    789					0x00000000 0x00000000 0x00000000 0x00000000>;
    790			};
    791
    792			emc-table@50000 {
    793				reg = <50000>;
    794				compatible = "nvidia,tegra20-emc-table";
    795				clock-frequency = <50000>;
    796				nvidia,emc-registers = <0x00000003 0x00000007
    797					0x00000003 0x00000003 0x00000006 0x00000004
    798					0x00000002 0x00000009 0x00000003 0x00000003
    799					0x00000002 0x00000002 0x00000002 0x00000005
    800					0x00000003 0x00000008 0x0000000b 0x0000009f
    801					0x00000000 0x00000003 0x00000003 0x00000003
    802					0x00000008 0x00000001 0x0000000a 0x00000007
    803					0x00000003 0x00000008 0x00000004 0x00000006
    804					0x00000002 0x000000d0 0x00000000 0x00000000
    805					0x00000000 0x00000000 0x00000282 0xa0ae04ae
    806					0x00070000 0x00000000 0x00000000 0x00000005
    807					0x00000000 0x00000000 0x00000000 0x00000000>;
    808			};
    809
    810			emc-table@75000 {
    811				reg = <75000>;
    812				compatible = "nvidia,tegra20-emc-table";
    813				clock-frequency = <75000>;
    814				nvidia,emc-registers = <0x00000005 0x0000000a
    815					0x00000004 0x00000003 0x00000006 0x00000004
    816					0x00000002 0x00000009 0x00000003 0x00000003
    817					0x00000002 0x00000002 0x00000002 0x00000005
    818					0x00000003 0x00000008 0x0000000b 0x000000ff
    819					0x00000000 0x00000003 0x00000003 0x00000003
    820					0x00000008 0x00000001 0x0000000a 0x0000000b
    821					0x00000003 0x00000008 0x00000004 0x00000006
    822					0x00000002 0x00000138 0x00000000 0x00000000
    823					0x00000000 0x00000000 0x00000282 0xa0ae04ae
    824					0x00070000 0x00000000 0x00000000 0x00000007
    825					0x00000000 0x00000000 0x00000000 0x00000000>;
    826			};
    827
    828			emc-table@150000 {
    829				reg = <150000>;
    830				compatible = "nvidia,tegra20-emc-table";
    831				clock-frequency = <150000>;
    832				nvidia,emc-registers = <0x00000009 0x00000014
    833					0x00000007 0x00000003 0x00000006 0x00000004
    834					0x00000002 0x00000009 0x00000003 0x00000003
    835					0x00000002 0x00000002 0x00000002 0x00000005
    836					0x00000003 0x00000008 0x0000000b 0x0000021f
    837					0x00000000 0x00000003 0x00000003 0x00000003
    838					0x00000008 0x00000001 0x0000000a 0x00000015
    839					0x00000003 0x00000008 0x00000004 0x00000006
    840					0x00000002 0x00000270 0x00000000 0x00000001
    841					0x00000000 0x00000000 0x00000282 0xa07c04ae
    842					0x007dc010 0x00000000 0x00000000 0x0000000e
    843					0x00000000 0x00000000 0x00000000 0x00000000>;
    844			};
    845
    846			emc-table@300000 {
    847				reg = <300000>;
    848				compatible = "nvidia,tegra20-emc-table";
    849				clock-frequency = <300000>;
    850				nvidia,emc-registers = <0x00000012 0x00000027
    851					0x0000000d 0x00000006 0x00000007 0x00000005
    852					0x00000003 0x00000009 0x00000006 0x00000006
    853					0x00000003 0x00000003 0x00000002 0x00000006
    854					0x00000003 0x00000009 0x0000000c 0x0000045f
    855					0x00000000 0x00000004 0x00000004 0x00000006
    856					0x00000008 0x00000001 0x0000000e 0x0000002a
    857					0x00000003 0x0000000f 0x00000007 0x00000005
    858					0x00000002 0x000004e0 0x00000005 0x00000002
    859					0x00000000 0x00000000 0x00000282 0xe059048b
    860					0x007e0010 0x00000000 0x00000000 0x0000001b
    861					0x00000000 0x00000000 0x00000000 0x00000000>;
    862			};
    863		};
    864	};
    865
    866	/* Peripheral USB via ASUS connector */
    867	usb@c5000000 {
    868		compatible = "nvidia,tegra20-udc";
    869		status = "okay";
    870		dr_mode = "peripheral";
    871	};
    872
    873	usb-phy@c5000000 {
    874		status = "okay";
    875		dr_mode = "peripheral";
    876		nvidia,xcvr-setup-use-fuses;
    877		nvidia,xcvr-lsfslew = <2>;
    878		nvidia,xcvr-lsrslew = <2>;
    879		vbus-supply = <&vdd_5v0_sys>;
    880	};
    881
    882	/* Dock's USB port */
    883	usb@c5008000 {
    884		status = "okay";
    885	};
    886
    887	usb-phy@c5008000 {
    888		status = "okay";
    889		nvidia,xcvr-setup-use-fuses;
    890		vbus-supply = <&vdd_5v0_sys>;
    891	};
    892
    893	sdmmc1: mmc@c8000000 {
    894		status = "okay";
    895
    896		#address-cells = <1>;
    897		#size-cells = <0>;
    898
    899		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
    900		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
    901		assigned-clock-rates = <40000000>;
    902
    903		max-frequency = <40000000>;
    904		keep-power-in-suspend;
    905		bus-width = <4>;
    906		non-removable;
    907
    908		mmc-pwrseq = <&brcm_wifi_pwrseq>;
    909		vmmc-supply = <&vdd_3v3_sys>;
    910		vqmmc-supply = <&vdd_3v3_sys>;
    911
    912		/* Azurewave AW-NH615 BCM4329B1 */
    913		wifi@1 {
    914			compatible = "brcm,bcm4329-fmac";
    915			reg = <1>;
    916
    917			interrupt-parent = <&gpio>;
    918			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
    919			interrupt-names = "host-wake";
    920		};
    921	};
    922
    923	sdmmc3: mmc@c8000400 {
    924		status = "okay";
    925		bus-width = <4>;
    926		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
    927		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
    928		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
    929		vmmc-supply = <&vdd_3v3_sys>;
    930		vqmmc-supply = <&vdd_3v3_sys>;
    931	};
    932
    933	sdmmc4: mmc@c8000600 {
    934		status = "okay";
    935		bus-width = <8>;
    936		vmmc-supply = <&vcore_emmc>;
    937		vqmmc-supply = <&vdd_3v3_sys>;
    938		non-removable;
    939	};
    940
    941	mains: ac-adapter-detect {
    942		compatible = "gpio-charger";
    943		charger-type = "mains";
    944		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
    945	};
    946
    947	backlight: backlight {
    948		compatible = "pwm-backlight";
    949
    950		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
    951		power-supply = <&vdd_3v3_sys>;
    952		pwms = <&pwm 2 4000000>;
    953
    954		brightness-levels = <7 255>;
    955		num-interpolated-steps = <248>;
    956		default-brightness-level = <20>;
    957	};
    958
    959	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
    960	clk32k_in: clock-32k-in {
    961		compatible = "fixed-clock";
    962		clock-frequency = <32768>;
    963		#clock-cells = <0>;
    964	};
    965
    966	cpus {
    967		cpu0: cpu@0 {
    968			cpu-supply = <&vdd_cpu>;
    969			operating-points-v2 = <&cpu0_opp_table>;
    970			#cooling-cells = <2>;
    971		};
    972
    973		cpu1: cpu@1 {
    974			cpu-supply = <&vdd_cpu>;
    975			operating-points-v2 = <&cpu0_opp_table>;
    976			#cooling-cells = <2>;
    977		};
    978	};
    979
    980	gpio-keys {
    981		compatible = "gpio-keys";
    982
    983		dock-hall-sensor {
    984			label = "Lid";
    985			gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
    986			linux,input-type = <EV_SW>;
    987			linux,code = <SW_LID>;
    988			debounce-interval = <500>;
    989			wakeup-event-action = <EV_ACT_ASSERTED>;
    990			wakeup-source;
    991		};
    992
    993		power {
    994			label = "Power";
    995			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
    996			linux,code = <KEY_POWER>;
    997			debounce-interval = <10>;
    998			wakeup-event-action = <EV_ACT_ASSERTED>;
    999			wakeup-source;
   1000		};
   1001
   1002		volume-up {
   1003			label = "Volume Up";
   1004			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
   1005			linux,code = <KEY_VOLUMEUP>;
   1006			debounce-interval = <10>;
   1007			wakeup-event-action = <EV_ACT_ASSERTED>;
   1008			wakeup-source;
   1009		};
   1010
   1011		volume-down {
   1012			label = "Volume Down";
   1013			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
   1014			linux,code = <KEY_VOLUMEDOWN>;
   1015			debounce-interval = <10>;
   1016			wakeup-event-action = <EV_ACT_ASSERTED>;
   1017			wakeup-source;
   1018		};
   1019	};
   1020
   1021	display-panel {
   1022		compatible = "panel-lvds";
   1023
   1024		/* AUO B101EW05 using custom timings */
   1025
   1026		backlight = <&backlight>;
   1027		ddc-i2c-bus = <&lvds_ddc>;
   1028		power-supply = <&vdd_pnl_reg>;
   1029
   1030		width-mm = <218>;
   1031		height-mm = <135>;
   1032
   1033		data-mapping = "jeida-18";
   1034
   1035		panel-timing {
   1036			clock-frequency = <71200000>;
   1037			hactive = <1280>;
   1038			vactive = <800>;
   1039			hfront-porch = <8>;
   1040			hback-porch = <18>;
   1041			hsync-len = <184>;
   1042			vsync-len = <3>;
   1043			vfront-porch = <4>;
   1044			vback-porch = <8>;
   1045		};
   1046
   1047		port {
   1048			panel_input: endpoint {
   1049				remote-endpoint = <&lvds_encoder_output>;
   1050			};
   1051		};
   1052	};
   1053
   1054	i2cmux {
   1055		compatible = "i2c-mux-pinctrl";
   1056		#address-cells = <1>;
   1057		#size-cells = <0>;
   1058
   1059		i2c-parent = <&i2c2>;
   1060
   1061		pinctrl-names = "ddc", "pta", "idle";
   1062		pinctrl-0 = <&state_i2cmux_ddc>;
   1063		pinctrl-1 = <&state_i2cmux_pta>;
   1064		pinctrl-2 = <&state_i2cmux_idle>;
   1065
   1066		hdmi_ddc: i2c@0 {
   1067			reg = <0>;
   1068			#address-cells = <1>;
   1069			#size-cells = <0>;
   1070		};
   1071
   1072		lvds_ddc: i2c@1 {
   1073			reg = <1>;
   1074			#address-cells = <1>;
   1075			#size-cells = <0>;
   1076
   1077			smart-battery@b {
   1078				compatible = "ti,bq20z75", "sbs,sbs-battery";
   1079				reg = <0xb>;
   1080				sbs,i2c-retry-count = <2>;
   1081				sbs,poll-retry-count = <10>;
   1082				power-supplies = <&mains>;
   1083			};
   1084		};
   1085	};
   1086
   1087	lvds-encoder {
   1088		compatible = "ti,sn75lvds83", "lvds-encoder";
   1089
   1090		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
   1091		power-supply = <&vdd_3v3_sys>;
   1092
   1093		ports {
   1094			#address-cells = <1>;
   1095			#size-cells = <0>;
   1096
   1097			port@0 {
   1098				reg = <0>;
   1099
   1100				lvds_encoder_input: endpoint {
   1101					remote-endpoint = <&lcd_output>;
   1102				};
   1103			};
   1104
   1105			port@1 {
   1106				reg = <1>;
   1107
   1108				lvds_encoder_output: endpoint {
   1109					remote-endpoint = <&panel_input>;
   1110				};
   1111			};
   1112		};
   1113	};
   1114
   1115	vdd_5v0_sys: regulator-5v0 {
   1116		compatible = "regulator-fixed";
   1117		regulator-name = "vdd_5v0";
   1118		regulator-min-microvolt = <5000000>;
   1119		regulator-max-microvolt = <5000000>;
   1120		regulator-always-on;
   1121	};
   1122
   1123	vdd_3v3_sys: regulator-3v3 {
   1124		compatible = "regulator-fixed";
   1125		regulator-name = "vdd_3v3_vs";
   1126		regulator-min-microvolt = <3300000>;
   1127		regulator-max-microvolt = <3300000>;
   1128		regulator-always-on;
   1129		vin-supply = <&vdd_5v0_sys>;
   1130	};
   1131
   1132	regulator-pcie {
   1133		compatible = "regulator-fixed";
   1134		regulator-name = "pcie_vdd";
   1135		regulator-min-microvolt = <1500000>;
   1136		regulator-max-microvolt = <1500000>;
   1137		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
   1138		regulator-always-on;
   1139	};
   1140
   1141	vdd_pnl_reg: regulator-panel {
   1142		compatible = "regulator-fixed";
   1143		regulator-name = "vdd_pnl";
   1144		regulator-min-microvolt = <2800000>;
   1145		regulator-max-microvolt = <2800000>;
   1146		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
   1147		enable-active-high;
   1148	};
   1149
   1150	vdd_1v8_sys: regulator-1v8 {
   1151		compatible = "regulator-fixed";
   1152		regulator-name = "vdd_1v8_vs";
   1153		regulator-min-microvolt = <1800000>;
   1154		regulator-max-microvolt = <1800000>;
   1155		regulator-always-on;
   1156		vin-supply = <&vdd_5v0_sys>;
   1157	};
   1158
   1159	vdd_hdmi_en: regulator-hdmi {
   1160		compatible = "regulator-fixed";
   1161		regulator-name = "vdd_5v0_hdmi_en";
   1162		regulator-min-microvolt = <5000000>;
   1163		regulator-max-microvolt = <5000000>;
   1164		regulator-always-on;
   1165		vin-supply = <&vdd_5v0_sys>;
   1166		gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
   1167		enable-active-high;
   1168	};
   1169
   1170	sound {
   1171		compatible = "asus,tegra-audio-wm8903-tf101",
   1172			     "nvidia,tegra-audio-wm8903";
   1173		nvidia,model = "Asus EeePad Transformer WM8903";
   1174
   1175		nvidia,audio-routing =
   1176			"Headphone Jack", "HPOUTR",
   1177			"Headphone Jack", "HPOUTL",
   1178			"Int Spk", "ROP",
   1179			"Int Spk", "RON",
   1180			"Int Spk", "LOP",
   1181			"Int Spk", "LON",
   1182			"Mic Jack", "MICBIAS",
   1183			"IN1L", "Mic Jack";
   1184
   1185		nvidia,i2s-controller = <&tegra_i2s1>;
   1186		nvidia,audio-codec = <&wm8903>;
   1187
   1188		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
   1189		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
   1190		nvidia,headset;
   1191
   1192		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
   1193			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
   1194			 <&tegra_car TEGRA20_CLK_CDEV1>;
   1195		clock-names = "pll_a", "pll_a_out0", "mclk";
   1196	};
   1197
   1198	thermal-zones {
   1199		/*
   1200		 * NCT1008 has two sensors:
   1201		 *
   1202		 *	0: internal that monitors ambient/skin temperature
   1203		 *	1: external that is connected to the CPU's diode
   1204		 *
   1205		 * Ideally we should use userspace thermal governor,
   1206		 * but it's a much more complex solution.  The "skin"
   1207		 * zone is a simpler solution which prevents TF101 from
   1208		 * getting too hot from a user's tactile perspective.
   1209		 * The CPU zone is intended to protect silicon from damage.
   1210		 */
   1211
   1212		skin-thermal {
   1213			polling-delay-passive = <1000>; /* milliseconds */
   1214			polling-delay = <5000>; /* milliseconds */
   1215
   1216			thermal-sensors = <&nct1008 0>;
   1217
   1218			trips {
   1219				trip0: skin-alert {
   1220					/* start throttling at 60C */
   1221					temperature = <60000>;
   1222					hysteresis = <200>;
   1223					type = "passive";
   1224				};
   1225
   1226				trip1: skin-crit {
   1227					/* shut down at 70C */
   1228					temperature = <70000>;
   1229					hysteresis = <2000>;
   1230					type = "critical";
   1231				};
   1232			};
   1233
   1234			cooling-maps {
   1235				map0 {
   1236					trip = <&trip0>;
   1237					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
   1238							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
   1239				};
   1240			};
   1241		};
   1242
   1243		cpu-thermal {
   1244			polling-delay-passive = <1000>; /* milliseconds */
   1245			polling-delay = <5000>; /* milliseconds */
   1246
   1247			thermal-sensors = <&nct1008 1>;
   1248
   1249			trips {
   1250				trip2: cpu-alert {
   1251					/* throttle at 85C until temperature drops to 84.8C */
   1252					temperature = <85000>;
   1253					hysteresis = <200>;
   1254					type = "passive";
   1255				};
   1256
   1257				trip3: cpu-crit {
   1258					/* shut down at 90C */
   1259					temperature = <90000>;
   1260					hysteresis = <2000>;
   1261					type = "critical";
   1262				};
   1263			};
   1264
   1265			cooling-maps {
   1266				map1 {
   1267					trip = <&trip2>;
   1268					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
   1269							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
   1270				};
   1271			};
   1272		};
   1273	};
   1274
   1275	brcm_wifi_pwrseq: wifi-pwrseq {
   1276		compatible = "mmc-pwrseq-simple";
   1277
   1278		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
   1279		clock-names = "ext_clock";
   1280
   1281		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
   1282		post-power-on-delay-ms = <200>;
   1283		power-off-delay-us = <200>;
   1284	};
   1285};
   1286
   1287&emc_icc_dvfs_opp_table {
   1288	/delete-node/ opp-666000000;
   1289	/delete-node/ opp-760000000;
   1290};