cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra20-colibri-eval-v3.dts (4883B)


      1// SPDX-License-Identifier: GPL-2.0 OR MIT
      2/dts-v1/;
      3
      4#include <dt-bindings/input/input.h>
      5#include "tegra20-colibri.dtsi"
      6
      7/ {
      8	model = "Toradex Colibri T20 on Colibri Evaluation Board";
      9	compatible = "toradex,colibri_t20-eval-v3", "toradex,colibri_t20",
     10		     "nvidia,tegra20";
     11
     12	aliases {
     13		rtc0 = "/i2c@7000c000/rtc@68";
     14		rtc1 = "/i2c@7000d000/pmic@34";
     15		rtc2 = "/rtc@7000e000";
     16		serial0 = &uarta;
     17		serial1 = &uartd;
     18		serial2 = &uartb;
     19	};
     20
     21	chosen {
     22		stdout-path = "serial0:115200n8";
     23	};
     24
     25	host1x@50000000 {
     26		dc@54200000 {
     27			rgb {
     28				status = "okay";
     29				nvidia,panel = <&panel>;
     30			};
     31		};
     32
     33		hdmi@54280000 {
     34			status = "okay";
     35			hdmi-supply = <&reg_5v0>;
     36		};
     37	};
     38
     39	pinmux@70000014 {
     40		state_default: pinmux {
     41			bl-on {
     42				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     43			};
     44
     45			ddc {
     46				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     47			};
     48
     49			hotplug-detect {
     50				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     51			};
     52
     53			i2c {
     54				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     55			};
     56
     57			lcd {
     58				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     59			};
     60
     61			lm1 {
     62				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     63			};
     64
     65			mmc {
     66				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     67			};
     68
     69			mmccd {
     70				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     71			};
     72
     73			sdc {
     74				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     75			};
     76
     77			sdb_sdd {
     78				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     79			};
     80
     81			ssp {
     82				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     83			};
     84
     85			uart-a {
     86				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     87			};
     88
     89			uart-b {
     90				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     91			};
     92
     93			uart-c {
     94				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     95			};
     96
     97			usbh-pen {
     98				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     99			};
    100		};
    101	};
    102
    103	/* Colibri UART-A */
    104	serial@70006000 {
    105		status = "okay";
    106	};
    107
    108	/* Colibri UART-C */
    109	serial@70006040 {
    110		status = "okay";
    111	};
    112
    113	/* Colibri UART-B */
    114	serial@70006300 {
    115		status = "okay";
    116	};
    117
    118	pwm@7000a000 {
    119		status = "okay";
    120	};
    121
    122	/*
    123	 * GEN1_I2C: I2C_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
    124	 * board)
    125	 */
    126	i2c@7000c000 {
    127		status = "okay";
    128		clock-frequency = <400000>;
    129
    130		/* M41T0M6 real time clock on carrier board */
    131		rtc@68 {
    132			compatible = "st,m41t0";
    133			reg = <0x68>;
    134		};
    135	};
    136
    137	/* GEN2_I2C: unused */
    138
    139	/* CAM_I2C (I2C3): unused */
    140
    141	/* DDC_CLOCK/DATA on X3 pin 15/16 (e.g. display EDID) */
    142	i2c@7000c400 {
    143		status = "okay";
    144	};
    145
    146	/* EHCI instance 0: USB1_DP/N -> USBC_P/N */
    147	usb@c5000000 {
    148		status = "okay";
    149		dr_mode = "otg";
    150	};
    151
    152	usb-phy@c5000000 {
    153		status = "okay";
    154		vbus-supply = <&reg_usbc_vbus>;
    155	};
    156
    157	/* EHCI instance 2: USB3_DP/N -> USBH_P/N */
    158	usb@c5008000 {
    159		status = "okay";
    160	};
    161
    162	usb-phy@c5008000 {
    163		status = "okay";
    164		vbus-supply = <&reg_usbh_vbus>;
    165	};
    166
    167	/* SPI4: Colibri SSP */
    168	spi@7000da00 {
    169		status = "okay";
    170		spi-max-frequency = <25000000>;
    171
    172		can@0 {
    173			compatible = "microchip,mcp2515";
    174			reg = <0>;
    175			clocks = <&clk16m>;
    176			interrupt-parent = <&gpio>;
    177			/* CAN_INT */
    178			interrupts = <TEGRA_GPIO(A, 0) IRQ_TYPE_EDGE_FALLING>;
    179			spi-max-frequency = <10000000>;
    180			vdd-supply = <&reg_3v3>;
    181			xceiver-supply = <&reg_5v0>;
    182		};
    183	};
    184
    185	/* SD/MMC */
    186	mmc@c8000600 {
    187		status = "okay";
    188		bus-width = <4>;
    189		cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; /* MMCD */
    190		no-1-8-v;
    191	};
    192
    193	backlight: backlight {
    194		compatible = "pwm-backlight";
    195		brightness-levels = <255 128 64 32 16 8 4 0>;
    196		default-brightness-level = <6>;
    197		/* BL_ON */
    198		enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>;
    199		power-supply = <&reg_3v3>;
    200		pwms = <&pwm 0 5000000>; /* PWM<A> */
    201	};
    202
    203	clk16m: osc3 {
    204		compatible = "fixed-clock";
    205		#clock-cells = <0>;
    206		clock-frequency = <16000000>;
    207	};
    208
    209	gpio-keys {
    210		compatible = "gpio-keys";
    211
    212		wakeup {
    213			label = "SODIMM pin 45 wakeup";
    214			gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
    215			linux,code = <KEY_WAKEUP>;
    216			debounce-interval = <10>;
    217			wakeup-source;
    218		};
    219	};
    220
    221	panel: panel {
    222		/*
    223		 * edt,et057090dhu: EDT 5.7" LCD TFT
    224		 * edt,et070080dh6: EDT 7.0" LCD TFT
    225		 */
    226		compatible = "edt,et057090dhu";
    227		backlight = <&backlight>;
    228		power-supply = <&reg_3v3>;
    229	};
    230
    231	reg_3v3: regulator-3v3 {
    232		compatible = "regulator-fixed";
    233		regulator-name = "3.3V_SW";
    234		regulator-min-microvolt = <3300000>;
    235		regulator-max-microvolt = <3300000>;
    236	};
    237
    238	reg_5v0: regulator-5v0 {
    239		compatible = "regulator-fixed";
    240		regulator-name = "5V_SW";
    241		regulator-min-microvolt = <5000000>;
    242		regulator-max-microvolt = <5000000>;
    243	};
    244
    245	reg_usbc_vbus: regulator-usbc-vbus {
    246		compatible = "regulator-fixed";
    247		regulator-name = "VCC_USB5";
    248		regulator-min-microvolt = <5000000>;
    249		regulator-max-microvolt = <5000000>;
    250		vin-supply = <&reg_5v0>;
    251	};
    252
    253	/* USBH_PEN resp. USB_P_EN */
    254	reg_usbh_vbus: regulator-usbh-vbus {
    255		compatible = "regulator-fixed";
    256		regulator-name = "VCC_USB[1-4]";
    257		regulator-min-microvolt = <5000000>;
    258		regulator-max-microvolt = <5000000>;
    259		gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
    260		vin-supply = <&reg_5v0>;
    261	};
    262};