cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

tegra20-medcom-wide.dts (2863B)

      1// SPDX-License-Identifier: GPL-2.0
      2/dts-v1/;
      3
      4#include "tegra20-tamonten.dtsi"
      5
      6/ {
      7	model = "Avionic Design Medcom-Wide board";
      8	compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
      9
     10	aliases {
     11		serial0 = &uartd;
     12	};
     13
     14	chosen {
     15		stdout-path = "serial0:115200n8";
     16	};
     17
     18	pwm@7000a000 {
     19		status = "okay";
     20	};
     21
     22	host1x@50000000 {
     23		dc@54200000 {
     24			rgb {
     25				status = "okay";
     26				nvidia,panel = <&panel>;
     27			};
     28		};
     29	};
     30
     31	i2c@7000c000 {
     32		wm8903: wm8903@1a {
     33			compatible = "wlf,wm8903";
     34			reg = <0x1a>;
     35			interrupt-parent = <&gpio>;
     36			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
     37
     38			gpio-controller;
     39			#gpio-cells = <2>;
     40
     41			micdet-cfg = <0>;
     42			micdet-delay = <100>;
     43			gpio-cfg = <0xffffffff
     44				    0xffffffff
     45				    0
     46				    0xffffffff
     47				    0xffffffff>;
     48		};
     49	};
     50
     51	backlight: backlight {
     52		compatible = "pwm-backlight";
     53		pwms = <&pwm 0 5000000>;
     54
     55		brightness-levels = <0 4 8 16 32 64 128 255>;
     56		default-brightness-level = <6>;
     57
     58		/* close enough */
     59		power-supply = <&vdd_3v3_reg>;
     60	};
     61
     62	panel: panel {
     63		compatible = "innolux,n156bge-l21";
     64
     65		power-supply =  <&vdd_1v8_reg>; // <&vdd_3v3_reg>;
     66		enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
     67
     68		backlight = <&backlight>;
     69	};
     70
     71	sound {
     72		compatible = "ad,tegra-audio-wm8903-medcom-wide",
     73			     "nvidia,tegra-audio-wm8903";
     74		nvidia,model = "Avionic Design Medcom-Wide";
     75
     76		nvidia,audio-routing =
     77			"Headphone Jack", "HPOUTR",
     78			"Headphone Jack", "HPOUTL",
     79			"Int Spk", "ROP",
     80			"Int Spk", "RON",
     81			"Int Spk", "LOP",
     82			"Int Spk", "LON",
     83			"Mic Jack", "MICBIAS",
     84			"IN1L", "Mic Jack";
     85
     86		nvidia,i2s-controller = <&tegra_i2s1>;
     87		nvidia,audio-codec = <&wm8903>;
     88
     89		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
     90		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
     91
     92		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
     93			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
     94			 <&tegra_car TEGRA20_CLK_CDEV1>;
     95		clock-names = "pll_a", "pll_a_out0", "mclk";
     96	};
     97
     98	vcc_24v_reg: regulator-24v0 {
     99		compatible = "regulator-fixed";
    100		regulator-name = "vcc_24v";
    101		regulator-min-microvolt = <24000000>;
    102		regulator-max-microvolt = <24000000>;
    103		regulator-always-on;
    104	};
    105
    106	vdd_5v0_reg: regulator-5v0 {
    107		compatible = "regulator-fixed";
    108		regulator-name = "vdd_5v0";
    109		vin-supply = <&vcc_24v_reg>;
    110		regulator-min-microvolt = <5000000>;
    111		regulator-max-microvolt = <5000000>;
    112		regulator-always-on;
    113	};
    114
    115	vdd_3v3_reg: regulator-3v3 {
    116		compatible = "regulator-fixed";
    117		regulator-name = "vdd_3v3";
    118		vin-supply = <&vcc_24v_reg>;
    119		regulator-min-microvolt = <3300000>;
    120		regulator-max-microvolt = <3300000>;
    121		regulator-always-on;
    122	};
    123
    124	vdd_1v8_reg: regulator-1v8 {
    125		compatible = "regulator-fixed";
    126		regulator-name = "vdd_1v8";
    127		vin-supply = <&vdd_3v3_reg>;
    128		regulator-min-microvolt = <1800000>;
    129		regulator-max-microvolt = <1800000>;
    130		regulator-always-on;
    131	};
    132};