cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra30-apalis-v1.1-eval.dts (5223B)


      1// SPDX-License-Identifier: GPL-2.0 OR MIT
      2/dts-v1/;
      3
      4#include <dt-bindings/input/input.h>
      5#include "tegra30-apalis-v1.1.dtsi"
      6
      7/ {
      8	model = "Toradex Apalis T30 on Apalis Evaluation Board";
      9	compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
     10		     "toradex,apalis_t30-v1.1", "toradex,apalis_t30",
     11		     "nvidia,tegra30";
     12
     13	aliases {
     14		rtc0 = "/i2c@7000c000/rtc@68";
     15		rtc1 = "/i2c@7000d000/pmic@2d";
     16		rtc2 = "/rtc@7000e000";
     17		serial0 = &uarta;
     18		serial1 = &uartb;
     19		serial2 = &uartc;
     20		serial3 = &uartd;
     21	};
     22
     23	chosen {
     24		stdout-path = "serial0:115200n8";
     25	};
     26
     27	pcie@3000 {
     28		pci@1,0 {
     29			status = "okay";
     30		};
     31
     32		pci@2,0 {
     33			status = "okay";
     34		};
     35	};
     36
     37	host1x@50000000 {
     38		dc@54200000 {
     39			rgb {
     40				status = "okay";
     41				nvidia,panel = <&panel>;
     42			};
     43		};
     44
     45		hdmi@54280000 {
     46			status = "okay";
     47			hdmi-supply = <&reg_5v0>;
     48		};
     49	};
     50
     51	/* Apalis UART1 */
     52	serial@70006000 {
     53		status = "okay";
     54	};
     55
     56	/* Apalis UART2 */
     57	serial@70006040 {
     58		status = "okay";
     59	};
     60
     61	/* Apalis UART3 */
     62	serial@70006200 {
     63		status = "okay";
     64	};
     65
     66	/* Apalis UART4 */
     67	serial@70006300 {
     68		status = "okay";
     69	};
     70
     71	pwm@7000a000 {
     72		status = "okay";
     73	};
     74
     75	/*
     76	 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
     77	 * board)
     78	 */
     79	i2c@7000c000 {
     80		status = "okay";
     81		clock-frequency = <400000>;
     82
     83		pcie-switch@58 {
     84			compatible = "plx,pex8605";
     85			reg = <0x58>;
     86		};
     87
     88		/* M41T0M6 real time clock on carrier board */
     89		rtc@68 {
     90			compatible = "st,m41t0";
     91			reg = <0x68>;
     92		};
     93	};
     94
     95	/* GEN2_I2C: unused */
     96
     97	/*
     98	 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
     99	 * carrier board)
    100	 */
    101	i2c@7000c500 {
    102		status = "okay";
    103		clock-frequency = <400000>;
    104	};
    105
    106	/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
    107	i2c@7000c700 {
    108		status = "okay";
    109	};
    110
    111	/* SPI1: Apalis SPI1 */
    112	spi@7000d400 {
    113		status = "okay";
    114		spi-max-frequency = <25000000>;
    115	};
    116
    117	/* SPI5: Apalis SPI2 */
    118	spi@7000dc00 {
    119		status = "okay";
    120		spi-max-frequency = <25000000>;
    121	};
    122
    123	/* Apalis SD1 */
    124	mmc@78000000 {
    125		status = "okay";
    126		bus-width = <4>;
    127		/* SD1_CD# */
    128		cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>;
    129		no-1-8-v;
    130	};
    131
    132	/* Apalis MMC1 */
    133	mmc@78000400 {
    134		status = "okay";
    135		bus-width = <8>;
    136		/* MMC1_CD# */
    137		cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
    138		vqmmc-supply = <&reg_vddio_sdmmc3>;
    139	};
    140
    141	/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
    142	usb@7d000000 {
    143		status = "okay";
    144		dr_mode = "otg";
    145	};
    146
    147	usb-phy@7d000000 {
    148		status = "okay";
    149		vbus-supply = <&reg_usbo1_vbus>;
    150	};
    151
    152	/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
    153	usb@7d004000 {
    154		status = "okay";
    155	};
    156
    157	usb-phy@7d004000 {
    158		status = "okay";
    159		vbus-supply = <&reg_usbh_vbus>;
    160	};
    161
    162	/* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
    163	usb@7d008000 {
    164		status = "okay";
    165	};
    166
    167	usb-phy@7d008000 {
    168		status = "okay";
    169		vbus-supply = <&reg_usbh_vbus>;
    170	};
    171
    172	backlight: backlight {
    173		compatible = "pwm-backlight";
    174		brightness-levels = <255 231 223 207 191 159 127 0>;
    175		default-brightness-level = <6>;
    176		/* BKL1_ON */
    177		enable-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
    178		power-supply = <&reg_3v3>;
    179		pwms = <&pwm 0 5000000>; /* BKL1_PWM */
    180	};
    181
    182	gpio-keys {
    183		compatible = "gpio-keys";
    184
    185		wakeup {
    186			label = "WAKE1_MICO";
    187			gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
    188			linux,code = <KEY_WAKEUP>;
    189			debounce-interval = <10>;
    190			wakeup-source;
    191		};
    192	};
    193
    194	panel: panel {
    195		/*
    196		 * edt,et057090dhu: EDT 5.7" LCD TFT
    197		 * edt,et070080dh6: EDT 7.0" LCD TFT
    198		 */
    199		compatible = "edt,et057090dhu";
    200		backlight = <&backlight>;
    201		power-supply = <&reg_3v3>;
    202	};
    203
    204	reg_3v3: regulator-3v3 {
    205		compatible = "regulator-fixed";
    206		regulator-name = "3.3V_SW";
    207		regulator-min-microvolt = <3300000>;
    208		regulator-max-microvolt = <3300000>;
    209	};
    210
    211	reg_5v0: regulator-5v0 {
    212		compatible = "regulator-fixed";
    213		regulator-name = "5V_SW";
    214		regulator-min-microvolt = <5000000>;
    215		regulator-max-microvolt = <5000000>;
    216	};
    217
    218	/* USBO1_EN */
    219	reg_usbo1_vbus: regulator-usbo1-vbus {
    220		compatible = "regulator-fixed";
    221		regulator-name = "VCC_USBO1";
    222		regulator-min-microvolt = <5000000>;
    223		regulator-max-microvolt = <5000000>;
    224		gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
    225		enable-active-high;
    226		vin-supply = <&reg_5v0>;
    227	};
    228
    229	/* USBH_EN */
    230	reg_usbh_vbus: regulator-usbh-vbus {
    231		compatible = "regulator-fixed";
    232		regulator-name = "VCC_USBH(2A|2C|2D|3|4)";
    233		regulator-min-microvolt = <5000000>;
    234		regulator-max-microvolt = <5000000>;
    235		gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
    236		enable-active-high;
    237		vin-supply = <&reg_5v0>;
    238	};
    239
    240	/*
    241	 * 1.8 volt resp. 3.3 volt VDDIO_SDMMC3 depending on
    242	 * EN_+3.3_SDMMC3 GPIO
    243	 */
    244	reg_vddio_sdmmc3: regulator-vddio-sdmmc3 {
    245		compatible = "regulator-gpio";
    246		regulator-name = "VDDIO_SDMMC3";
    247		regulator-min-microvolt = <1800000>;
    248		regulator-max-microvolt = <3300000>;
    249		regulator-type = "voltage";
    250		gpios = <&gpio TEGRA_GPIO(J, 5) GPIO_ACTIVE_HIGH>;
    251		states = <1800000 0x0>,
    252			 <3300000 0x1>;
    253		startup-delay-us = <100000>;
    254		vin-supply = <&vddio_sdmmc_1v8_reg>;
    255	};
    256};
    257
    258&gpio {
    259	/* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
    260	pex-perst-n-hog {
    261		gpio-hog;
    262		gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
    263		output-high;
    264		line-name = "PEX_PERST_N";
    265	};
    266};