cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra30-asus-nexus7-grouper-maxim-pmic.dtsi (4427B)


      1// SPDX-License-Identifier: GPL-2.0
      2
      3#include <dt-bindings/interrupt-controller/arm-gic.h>
      4#include <dt-bindings/gpio/gpio.h>
      5#include <dt-bindings/mfd/max77620.h>
      6
      7/ {
      8	i2c@7000d000 {
      9		pmic: pmic@3c {
     10			compatible = "maxim,max77663";
     11			reg = <0x3c>;
     12
     13			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
     14			#interrupt-cells = <2>;
     15			interrupt-controller;
     16
     17			#gpio-cells = <2>;
     18			gpio-controller;
     19
     20			system-power-controller;
     21
     22			pinctrl-names = "default";
     23			pinctrl-0 = <&max77620_default>;
     24
     25			max77620_default: pinmux {
     26				gpio4 {
     27					pins = "gpio4";
     28					function = "32k-out1";
     29				};
     30			};
     31
     32			cpu-pwr-req-hog {
     33				gpio-hog;
     34				gpios = <6 GPIO_ACTIVE_HIGH>;
     35				input;
     36			};
     37
     38			fps {
     39				fps0 {
     40					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
     41				};
     42
     43				fps1 {
     44					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
     45				};
     46
     47				fps2 {
     48					maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
     49				};
     50			};
     51
     52			regulators {
     53				in-sd0-supply = <&vdd_5v0_sys>;
     54				in-sd1-supply = <&vdd_5v0_sys>;
     55				in-sd2-supply = <&vdd_5v0_sys>;
     56				in-sd3-supply = <&vdd_5v0_sys>;
     57				in-sd4-supply = <&vdd_5v0_sys>;
     58
     59				in-ldo0-1-supply = <&vdd_1v35>;
     60				in-ldo2-supply   = <&vdd_3v3_sys>;
     61				in-ldo3-5-supply = <&vdd_3v3_sys>;
     62				in-ldo4-6-supply = <&vdd_5v0_sys>;
     63				in-ldo7-8-supply = <&vdd_1v35>;
     64
     65				vdd_cpu: sd0 {
     66					regulator-name = "vdd_cpu";
     67					regulator-min-microvolt = <800000>;
     68					regulator-max-microvolt = <1250000>;
     69					regulator-coupled-with = <&vdd_core>;
     70					regulator-coupled-max-spread = <300000>;
     71					regulator-max-step-microvolt = <100000>;
     72					regulator-always-on;
     73					regulator-boot-on;
     74
     75					nvidia,tegra-cpu-regulator;
     76				};
     77
     78				vdd_core: sd1 {
     79					regulator-name = "vdd_core";
     80					regulator-min-microvolt = <950000>;
     81					regulator-max-microvolt = <1350000>;
     82					regulator-coupled-with = <&vdd_cpu>;
     83					regulator-coupled-max-spread = <300000>;
     84					regulator-max-step-microvolt = <100000>;
     85					regulator-always-on;
     86					regulator-boot-on;
     87
     88					nvidia,tegra-core-regulator;
     89				};
     90
     91				vdd_1v8: sd2 {
     92					regulator-name = "vdd_gen1v8";
     93					regulator-min-microvolt = <1800000>;
     94					regulator-max-microvolt = <1800000>;
     95					regulator-always-on;
     96					regulator-boot-on;
     97				};
     98
     99				vdd_1v35: sd3 {
    100					regulator-name = "vdd_ddr3l_1v35";
    101					regulator-min-microvolt = <1350000>;
    102					regulator-max-microvolt = <1350000>;
    103					regulator-always-on;
    104					regulator-boot-on;
    105				};
    106
    107				ldo0 {
    108					regulator-name = "vdd_ddr_hs";
    109					regulator-min-microvolt = <1000000>;
    110					regulator-max-microvolt = <1000000>;
    111					regulator-always-on;
    112					regulator-boot-on;
    113				};
    114
    115				ldo2 {
    116					regulator-name = "vdd_ddr_rx";
    117					regulator-min-microvolt = <2800000>;
    118					regulator-max-microvolt = <2800000>;
    119					regulator-always-on;
    120					regulator-boot-on;
    121				};
    122
    123				vcore_emmc: ldo3 {
    124					regulator-name = "vcore_emmc";
    125					regulator-min-microvolt = <2850000>;
    126					regulator-max-microvolt = <3100000>;
    127					regulator-always-on;
    128				};
    129
    130				ldo4 {
    131					regulator-name = "vdd_rtc";
    132					regulator-min-microvolt = <1200000>;
    133					regulator-max-microvolt = <1200000>;
    134					regulator-always-on;
    135					regulator-boot-on;
    136				};
    137
    138				ldo5 {
    139					regulator-name = "vdd_camera";
    140					regulator-min-microvolt = <1800000>;
    141					regulator-max-microvolt = <1800000>;
    142				};
    143
    144				ldo6 {
    145					regulator-name = "vddio_sdmmc";
    146					regulator-min-microvolt = <1800000>;
    147					regulator-max-microvolt = <3300000>;
    148					regulator-always-on;
    149					regulator-boot-on;
    150				};
    151
    152				ldo7 {
    153					regulator-name = "avdd_dsi_csi";
    154					regulator-min-microvolt = <1200000>;
    155					regulator-max-microvolt = <1200000>;
    156				};
    157
    158				ldo8 {
    159					regulator-name = "avdd_pll";
    160					regulator-min-microvolt = <1200000>;
    161					regulator-max-microvolt = <1200000>;
    162					regulator-always-on;
    163					regulator-boot-on;
    164				};
    165			};
    166		};
    167	};
    168
    169	vdd_3v3_sys: regulator-3v3 {
    170		gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
    171		enable-active-high;
    172	};
    173
    174	regulator-usb {
    175		compatible = "regulator-fixed";
    176		regulator-name = "avdd_usb";
    177		regulator-min-microvolt = <3300000>;
    178		regulator-max-microvolt = <3300000>;
    179		regulator-always-on;
    180		regulator-boot-on;
    181		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
    182		enable-active-high;
    183		vin-supply = <&vdd_3v3_sys>;
    184	};
    185
    186	pmc@7000e400 {
    187		i2c-thermtrip {
    188			nvidia,i2c-controller-id = <4>;
    189			nvidia,bus-addr = <0x3c>;
    190			nvidia,reg-addr = <0x41>;
    191			nvidia,reg-data = <0xe0>;
    192		};
    193	};
    194};