cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tegra30-asus-nexus7-tilapia.dtsi (6654B)


      1// SPDX-License-Identifier: GPL-2.0
      2
      3#include "tegra30-asus-nexus7-grouper-common.dtsi"
      4#include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi"
      5
      6/ {
      7	compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30";
      8
      9	display-panel {
     10		enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
     11
     12		panel-timing {
     13			clock-frequency = <81750000>;
     14			hactive = <800>;
     15			vactive = <1280>;
     16			hfront-porch = <64>;
     17			hback-porch = <128>;
     18			hsync-len = <64>;
     19			vsync-len = <1>;
     20			vfront-porch = <5>;
     21			vback-porch = <2>;
     22		};
     23	};
     24
     25	gpio@6000d000 {
     26		init-mode-3g-hog {
     27			gpio-hog;
     28			gpios =	<TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>,
     29				<TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>,
     30				<TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>,
     31				<TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>,
     32				<TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>,
     33				<TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>,
     34				<TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>,
     35				<TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
     36				<TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>,
     37				<TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>,
     38				<TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>,
     39				<TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>,
     40				<TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>,
     41				<TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>,
     42				<TEGRA_GPIO(N, 1) GPIO_ACTIVE_HIGH>,
     43				<TEGRA_GPIO(N, 2) GPIO_ACTIVE_HIGH>,
     44				<TEGRA_GPIO(N, 0) GPIO_ACTIVE_HIGH>,
     45				<TEGRA_GPIO(N, 3) GPIO_ACTIVE_HIGH>;
     46			output-low;
     47		};
     48	};
     49
     50	pinmux@70000868 {
     51		state_default: pinmux {
     52			lcd_dc1_pd2 {
     53				nvidia,pins = "lcd_dc1_pd2";
     54				nvidia,function = "displaya";
     55				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     56				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     57				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     58			};
     59			lcd_pwr2_pc6 {
     60				nvidia,pins = "lcd_pwr2_pc6";
     61				nvidia,function = "displaya";
     62				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     63				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     64				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     65			};
     66			spi2_cs2_n_pw3 {
     67				nvidia,pins = "spi2_cs2_n_pw3";
     68				nvidia,function = "spi2";
     69				nvidia,pull = <TEGRA_PIN_PULL_UP>;
     70				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     71				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     72			};
     73			dap3_din_pp1 {
     74				nvidia,pins = "dap3_din_pp1";
     75				nvidia,function = "i2s2";
     76				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     77				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     78				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
     79			};
     80			spi1_sck_px5 {
     81				nvidia,pins = "spi1_sck_px5";
     82				nvidia,function = "spi1";
     83				nvidia,pull = <TEGRA_PIN_PULL_UP>;
     84				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     85				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     86			};
     87			pu5 {
     88				nvidia,pins = "pu5";
     89				nvidia,function = "pwm2";
     90				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     91				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     92				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
     93			};
     94			spi1_miso_px7 {
     95				nvidia,pins = "spi1_miso_px7";
     96				nvidia,function = "spi1";
     97				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
     98				nvidia,tristate = <TEGRA_PIN_DISABLE>;
     99				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    100			};
    101			spi2_mosi_px0 {
    102				nvidia,pins = "spi2_mosi_px0";
    103				nvidia,function = "spi2";
    104				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    105				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    106				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    107			};
    108			clk3_req_pee1 {
    109				nvidia,pins = "clk3_req_pee1";
    110				nvidia,function = "dev3";
    111				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    112				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    113				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    114			};
    115			ulpi_nxt_py2 {
    116				nvidia,pins = "ulpi_nxt_py2";
    117				nvidia,function = "uartd";
    118				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    119				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    120				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    121			};
    122			ulpi_stp_py3 {
    123				nvidia,pins = "ulpi_stp_py3";
    124				nvidia,function = "uartd";
    125				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    126				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    127				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    128			};
    129			kb_row7_pr7 {
    130				nvidia,pins = "kb_row7_pr7";
    131				nvidia,function = "kbc";
    132				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    133				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    134				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    135			};
    136			pu4 {
    137				nvidia,pins = "pu4";
    138				nvidia,function = "pwm1";
    139				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    140				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    141				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    142			};
    143			pu3 {
    144				nvidia,pins = "pu3";
    145				nvidia,function = "rsvd4";
    146				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
    147				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    148				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    149			};
    150			kb_row15_ps7 {
    151				nvidia,pins = "kb_row15_ps7";
    152				nvidia,function = "kbc";
    153				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    154				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    155				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    156			};
    157			dap3_sclk_pp3 {
    158				nvidia,pins = "dap3_sclk_pp3";
    159				nvidia,function = "i2s2";
    160				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    161				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    162				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
    163			};
    164			kb_row3_pr3 {
    165				nvidia,pins = "kb_row3_pr3",
    166						"kb_row13_ps5";
    167				nvidia,function = "kbc";
    168				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    169				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    170				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    171			};
    172			kb_row13_ps5 {
    173				nvidia,pins = "kb_row13_ps5";
    174				nvidia,function = "kbc";
    175				nvidia,pull = <TEGRA_PIN_PULL_UP>;
    176				nvidia,tristate = <TEGRA_PIN_DISABLE>;
    177				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    178			};
    179			gmi_wp_n_pc7 {
    180				nvidia,pins = "gmi_wp_n_pc7",
    181						"gmi_wait_pi7",
    182						"gmi_cs4_n_pk2",
    183						"gmi_cs3_n_pk4";
    184				nvidia,function = "rsvd1";
    185				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    186				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    187				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    188			};
    189			gmi_cs6_n_pi3 {
    190				nvidia,pins = "gmi_cs6_n_pi3";
    191				nvidia,function = "gmi";
    192				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
    193				nvidia,tristate = <TEGRA_PIN_ENABLE>;
    194				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
    195			};
    196		};
    197	};
    198
    199	i2c@7000c500 {
    200		proximity-sensor@28 {
    201			compatible = "microchip,cap1106";
    202			reg = <0x28>;
    203
    204			/*
    205			 * Binding doesn't support specifying linux,input-type
    206			 * and this results in unwanted key-presses handled by
    207			 * applications, hence keep it disabled for now.
    208			 */
    209			status = "disabled";
    210
    211			interrupt-parent = <&gpio>;
    212			interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>;
    213
    214			linux,keycodes = <KEY_RESERVED>,
    215					 <KEY_RESERVED>,
    216					 <KEY_RESERVED>,
    217					 <KEY_RESERVED>,
    218					 <KEY_RESERVED>,
    219					 <SW_FRONT_PROXIMITY>;
    220		};
    221
    222		nfc@2a {
    223			compatible = "nxp,pn544-i2c";
    224			reg = <0x2a>;
    225
    226			interrupt-parent = <&gpio>;
    227			interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
    228
    229			enable-gpios   = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
    230			firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
    231		};
    232	};
    233};