cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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uniphier-sld8-ref.dts (1209B)


      1// SPDX-License-Identifier: GPL-2.0+ OR MIT
      2//
      3// Device Tree Source for UniPhier sLD8 Reference Board
      4//
      5// Copyright (C) 2015-2016 Socionext Inc.
      6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
      7
      8/dts-v1/;
      9#include "uniphier-sld8.dtsi"
     10#include "uniphier-ref-daughter.dtsi"
     11#include "uniphier-support-card.dtsi"
     12
     13/ {
     14	model = "UniPhier sLD8 Reference Board";
     15	compatible = "socionext,uniphier-sld8-ref", "socionext,uniphier-sld8";
     16
     17	chosen {
     18		stdout-path = "serial0:115200n8";
     19	};
     20
     21	aliases {
     22		serial0 = &serial0;
     23		serial1 = &serialsc;
     24		serial2 = &serial2;
     25		serial3 = &serial3;
     26		i2c0 = &i2c0;
     27		i2c1 = &i2c1;
     28		i2c2 = &i2c2;
     29		i2c3 = &i2c3;
     30	};
     31
     32	memory@80000000 {
     33		device_type = "memory";
     34		reg = <0x80000000 0x20000000>;
     35	};
     36};
     37
     38&ethsc {
     39	interrupts = <0 8>;
     40};
     41
     42&serialsc {
     43	interrupts = <0 8>;
     44};
     45
     46&serial0 {
     47	status = "okay";
     48};
     49
     50&serial2 {
     51	status = "okay";
     52};
     53
     54&serial3 {
     55	status = "okay";
     56};
     57
     58&gpio {
     59	xirq0 {
     60		gpio-hog;
     61		gpios = <UNIPHIER_GPIO_IRQ(0) 0>;
     62		input;
     63	};
     64};
     65
     66&i2c0 {
     67	status = "okay";
     68};
     69
     70&sd {
     71	status = "okay";
     72};
     73
     74&usb0 {
     75	status = "okay";
     76};
     77
     78&usb1 {
     79	status = "okay";
     80};
     81
     82&usb2 {
     83	status = "okay";
     84};
     85
     86&nand {
     87	status = "okay";
     88
     89	nand@0 {
     90		reg = <0>;
     91	};
     92};