cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vf-colibri-eval-v3.dtsi (2454B)

      1// SPDX-License-Identifier: GPL-2.0+ OR MIT
      2/*
      3 * Copyright 2014-2020 Toradex
      4 */
      5
      6/ {
      7	chosen {
      8		stdout-path = "serial0:115200n8";
      9	};
     10
     11	clk16m: clk16m {
     12		compatible = "fixed-clock";
     13		#clock-cells = <0>;
     14		clock-frequency = <16000000>;
     15	};
     16
     17	panel: panel {
     18		compatible = "edt,et057090dhu";
     19		backlight = <&bl>;
     20
     21		port {
     22			panel_in: endpoint {
     23				remote-endpoint = <&dcu_out>;
     24			};
     25		};
     26	};
     27
     28	reg_3v3: regulator-3v3 {
     29		compatible = "regulator-fixed";
     30		regulator-name = "3.3V";
     31		regulator-min-microvolt = <3300000>;
     32		regulator-max-microvolt = <3300000>;
     33	};
     34
     35	reg_5v0: regulator-5v0 {
     36		compatible = "regulator-fixed";
     37		regulator-name = "5V";
     38		regulator-min-microvolt = <5000000>;
     39		regulator-max-microvolt = <5000000>;
     40	};
     41
     42	reg_usbh_vbus: regulator-usbh-vbus {
     43		compatible = "regulator-fixed";
     44		pinctrl-names = "default";
     45		pinctrl-0 = <&pinctrl_usbh1_reg>;
     46		regulator-name = "VCC_USB[1-4]";
     47		regulator-min-microvolt = <5000000>;
     48		regulator-max-microvolt = <5000000>;
     49		gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; /* USBH_PEN resp. USBH_P_EN */
     50		vin-supply = <&reg_5v0>;
     51	};
     52};
     53
     54&bl {
     55	brightness-levels = <0 4 8 16 32 64 128 255>;
     56	default-brightness-level = <6>;
     57	power-supply = <&reg_3v3>;
     58	status  = "okay";
     59};
     60
     61&dcu0 {
     62	pinctrl-names = "default";
     63	pinctrl-0 = <&pinctrl_dcu0_1>;
     64	status = "okay";
     65
     66	port {
     67		dcu_out: endpoint {
     68			remote-endpoint = <&panel_in>;
     69		};
     70	};
     71};
     72
     73&dspi1 {
     74	status = "okay";
     75
     76	mcp2515can: can@0 {
     77		compatible = "microchip,mcp2515";
     78		pinctrl-names = "default";
     79		pinctrl-0 = <&pinctrl_can_int>;
     80		reg = <0>;
     81		clocks = <&clk16m>;
     82		spi-max-frequency = <10000000>;
     83		interrupt-parent = <&gpio1>;
     84		interrupts = <11 IRQ_TYPE_EDGE_RISING>;
     85	};
     86};
     87
     88&esdhc1 {
     89	pinctrl-names = "default";
     90	pinctrl-0 = <&pinctrl_esdhc1>;
     91	bus-width = <4>;
     92	status = "okay";
     93};
     94
     95&fec1 {
     96	phy-mode = "rmii";
     97	pinctrl-names = "default";
     98	pinctrl-0 = <&pinctrl_fec1>;
     99	status = "okay";
    100};
    101
    102&i2c0 {
    103	status = "okay";
    104
    105	/* M41T0M6 real time clock on carrier board */
    106	rtc: rtc@68 {
    107		compatible = "st,m41t0";
    108		reg = <0x68>;
    109	};
    110};
    111
    112&pwm0 {
    113	status = "okay";
    114};
    115
    116&pwm1 {
    117	status = "okay";
    118};
    119
    120&reg_module_3v3 {
    121	vin-supply = <&reg_3v3>;
    122};
    123
    124&tcon0 {
    125	status = "okay";
    126};
    127
    128&uart0 {
    129	status = "okay";
    130};
    131
    132&uart1 {
    133	status = "okay";
    134};
    135
    136&uart2 {
    137	status = "okay";
    138};
    139
    140&usbh1 {
    141	vbus-supply = <&reg_usbh_vbus>;
    142};
    143
    144&iomuxc {
    145	vf610-colibri {
    146		pinctrl_can_int: can_int {
    147			fsl,pins = <
    148				VF610_PAD_PTB21__GPIO_43	0x22ed
    149			>;
    150		};
    151	};
    152};