vfxxx.dtsi (19537B)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2// 3// Copyright 2013 Freescale Semiconductor, Inc. 4 5#include "vf610-pinfunc.h" 6#include <dt-bindings/clock/vf610-clock.h> 7#include <dt-bindings/interrupt-controller/irq.h> 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 aliases { 12 can0 = &can0; 13 can1 = &can1; 14 ethernet0 = &fec0; 15 ethernet1 = &fec1; 16 serial0 = &uart0; 17 serial1 = &uart1; 18 serial2 = &uart2; 19 serial3 = &uart3; 20 serial4 = &uart4; 21 serial5 = &uart5; 22 gpio0 = &gpio0; 23 gpio1 = &gpio1; 24 gpio2 = &gpio2; 25 gpio3 = &gpio3; 26 gpio4 = &gpio4; 27 usbphy0 = &usbphy0; 28 usbphy1 = &usbphy1; 29 }; 30 31 fxosc: fxosc { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <24000000>; 35 }; 36 37 sxosc: sxosc { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <32768>; 41 }; 42 43 reboot: syscon-reboot { 44 compatible = "syscon-reboot"; 45 regmap = <&src>; 46 offset = <0x0>; 47 mask = <0x1000>; 48 }; 49 50 tempsensor: iio-hwmon { 51 compatible = "iio-hwmon"; 52 io-channels = <&adc0 16>, <&adc1 16>; 53 }; 54 55 soc { 56 #address-cells = <1>; 57 #size-cells = <1>; 58 compatible = "simple-bus"; 59 interrupt-parent = <&mscm_ir>; 60 ranges; 61 62 aips0: bus@40000000 { 63 compatible = "fsl,aips-bus", "simple-bus"; 64 #address-cells = <1>; 65 #size-cells = <1>; 66 reg = <0x40000000 0x00070000>; 67 ranges; 68 69 mscm_cpucfg: cpucfg@40001000 { 70 compatible = "fsl,vf610-mscm-cpucfg", "syscon"; 71 reg = <0x40001000 0x800>; 72 }; 73 74 mscm_ir: interrupt-controller@40001800 { 75 compatible = "fsl,vf610-mscm-ir"; 76 reg = <0x40001800 0x400>; 77 fsl,cpucfg = <&mscm_cpucfg>; 78 interrupt-controller; 79 #interrupt-cells = <2>; 80 }; 81 82 edma0: dma-controller@40018000 { 83 #dma-cells = <2>; 84 compatible = "fsl,vf610-edma"; 85 reg = <0x40018000 0x2000>, 86 <0x40024000 0x1000>, 87 <0x40025000 0x1000>; 88 dma-channels = <32>; 89 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, 90 <9 IRQ_TYPE_LEVEL_HIGH>; 91 interrupt-names = "edma-tx", "edma-err"; 92 clock-names = "dmamux0", "dmamux1"; 93 clocks = <&clks VF610_CLK_DMAMUX0>, 94 <&clks VF610_CLK_DMAMUX1>; 95 status = "disabled"; 96 }; 97 98 can0: can@40020000 { 99 compatible = "fsl,vf610-flexcan"; 100 reg = <0x40020000 0x4000>; 101 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; 102 clocks = <&clks VF610_CLK_FLEXCAN0>, 103 <&clks VF610_CLK_FLEXCAN0>; 104 clock-names = "ipg", "per"; 105 status = "disabled"; 106 }; 107 108 uart0: serial@40027000 { 109 compatible = "fsl,vf610-lpuart"; 110 reg = <0x40027000 0x1000>; 111 interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; 112 clocks = <&clks VF610_CLK_UART0>; 113 clock-names = "ipg"; 114 dmas = <&edma0 0 2>, 115 <&edma0 0 3>; 116 dma-names = "rx","tx"; 117 status = "disabled"; 118 }; 119 120 uart1: serial@40028000 { 121 compatible = "fsl,vf610-lpuart"; 122 reg = <0x40028000 0x1000>; 123 interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; 124 clocks = <&clks VF610_CLK_UART1>; 125 clock-names = "ipg"; 126 dmas = <&edma0 0 4>, 127 <&edma0 0 5>; 128 dma-names = "rx","tx"; 129 status = "disabled"; 130 }; 131 132 uart2: serial@40029000 { 133 compatible = "fsl,vf610-lpuart"; 134 reg = <0x40029000 0x1000>; 135 interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; 136 clocks = <&clks VF610_CLK_UART2>; 137 clock-names = "ipg"; 138 dmas = <&edma0 0 6>, 139 <&edma0 0 7>; 140 dma-names = "rx","tx"; 141 status = "disabled"; 142 }; 143 144 uart3: serial@4002a000 { 145 compatible = "fsl,vf610-lpuart"; 146 reg = <0x4002a000 0x1000>; 147 interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; 148 clocks = <&clks VF610_CLK_UART3>; 149 clock-names = "ipg"; 150 dmas = <&edma0 0 8>, 151 <&edma0 0 9>; 152 dma-names = "rx","tx"; 153 status = "disabled"; 154 }; 155 156 dspi0: spi@4002c000 { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 compatible = "fsl,vf610-dspi"; 160 reg = <0x4002c000 0x1000>; 161 interrupts = <67 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&clks VF610_CLK_DSPI0>; 163 clock-names = "dspi"; 164 spi-num-chipselects = <6>; 165 dmas = <&edma1 1 12>, 166 <&edma1 1 13>; 167 dma-names = "rx", "tx"; 168 status = "disabled"; 169 }; 170 171 dspi1: spi@4002d000 { 172 #address-cells = <1>; 173 #size-cells = <0>; 174 compatible = "fsl,vf610-dspi"; 175 reg = <0x4002d000 0x1000>; 176 interrupts = <68 IRQ_TYPE_LEVEL_HIGH>; 177 clocks = <&clks VF610_CLK_DSPI1>; 178 clock-names = "dspi"; 179 spi-num-chipselects = <4>; 180 dmas = <&edma1 1 14>, 181 <&edma1 1 15>; 182 dma-names = "rx", "tx"; 183 status = "disabled"; 184 }; 185 186 sai0: sai@4002f000 { 187 compatible = "fsl,vf610-sai"; 188 reg = <0x4002f000 0x1000>; 189 interrupts = <84 IRQ_TYPE_LEVEL_HIGH>; 190 clocks = <&clks VF610_CLK_SAI0>, 191 <&clks VF610_CLK_SAI0_DIV>, 192 <&clks 0>, <&clks 0>; 193 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 194 dma-names = "tx", "rx"; 195 dmas = <&edma0 0 17>, 196 <&edma0 0 16>; 197 status = "disabled"; 198 }; 199 200 sai1: sai@40030000 { 201 compatible = "fsl,vf610-sai"; 202 reg = <0x40030000 0x1000>; 203 interrupts = <85 IRQ_TYPE_LEVEL_HIGH>; 204 clocks = <&clks VF610_CLK_SAI1>, 205 <&clks VF610_CLK_SAI1_DIV>, 206 <&clks 0>, <&clks 0>; 207 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 208 dma-names = "tx", "rx"; 209 dmas = <&edma0 0 19>, 210 <&edma0 0 18>; 211 status = "disabled"; 212 }; 213 214 sai2: sai@40031000 { 215 compatible = "fsl,vf610-sai"; 216 reg = <0x40031000 0x1000>; 217 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>; 218 clocks = <&clks VF610_CLK_SAI2>, 219 <&clks VF610_CLK_SAI2_DIV>, 220 <&clks 0>, <&clks 0>; 221 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 222 dma-names = "tx", "rx"; 223 dmas = <&edma0 0 21>, 224 <&edma0 0 20>; 225 status = "disabled"; 226 }; 227 228 sai3: sai@40032000 { 229 compatible = "fsl,vf610-sai"; 230 reg = <0x40032000 0x1000>; 231 interrupts = <87 IRQ_TYPE_LEVEL_HIGH>; 232 clocks = <&clks VF610_CLK_SAI3>, 233 <&clks VF610_CLK_SAI3_DIV>, 234 <&clks 0>, <&clks 0>; 235 clock-names = "bus", "mclk1", "mclk2", "mclk3"; 236 dma-names = "tx", "rx"; 237 dmas = <&edma0 1 9>, 238 <&edma0 1 8>; 239 status = "disabled"; 240 }; 241 242 pit: pit@40037000 { 243 compatible = "fsl,vf610-pit"; 244 reg = <0x40037000 0x1000>; 245 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>; 246 clocks = <&clks VF610_CLK_PIT>; 247 clock-names = "pit"; 248 }; 249 250 pwm0: pwm@40038000 { 251 compatible = "fsl,vf610-ftm-pwm"; 252 #pwm-cells = <3>; 253 reg = <0x40038000 0x1000>; 254 clock-names = "ftm_sys", "ftm_ext", 255 "ftm_fix", "ftm_cnt_clk_en"; 256 clocks = <&clks VF610_CLK_FTM0>, 257 <&clks VF610_CLK_FTM0_EXT_SEL>, 258 <&clks VF610_CLK_FTM0_FIX_SEL>, 259 <&clks VF610_CLK_FTM0_EXT_FIX_EN>; 260 status = "disabled"; 261 }; 262 263 pwm1: pwm@40039000 { 264 compatible = "fsl,vf610-ftm-pwm"; 265 #pwm-cells = <3>; 266 reg = <0x40039000 0x1000>; 267 clock-names = "ftm_sys", "ftm_ext", 268 "ftm_fix", "ftm_cnt_clk_en"; 269 clocks = <&clks VF610_CLK_FTM1>, 270 <&clks VF610_CLK_FTM1_EXT_SEL>, 271 <&clks VF610_CLK_FTM1_FIX_SEL>, 272 <&clks VF610_CLK_FTM1_EXT_FIX_EN>; 273 status = "disabled"; 274 }; 275 276 adc0: adc@4003b000 { 277 compatible = "fsl,vf610-adc"; 278 reg = <0x4003b000 0x1000>; 279 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; 280 clocks = <&clks VF610_CLK_ADC0>; 281 clock-names = "adc"; 282 #io-channel-cells = <1>; 283 status = "disabled"; 284 fsl,adck-max-frequency = <30000000>, <40000000>, 285 <20000000>; 286 }; 287 288 tcon0: timing-controller@4003d000 { 289 compatible = "fsl,vf610-tcon"; 290 reg = <0x4003d000 0x1000>; 291 clocks = <&clks VF610_CLK_TCON0>; 292 clock-names = "ipg"; 293 status = "disabled"; 294 }; 295 296 wdoga5: watchdog@4003e000 { 297 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; 298 reg = <0x4003e000 0x1000>; 299 interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&clks VF610_CLK_WDT>; 301 clock-names = "wdog"; 302 status = "disabled"; 303 }; 304 305 qspi0: spi@40044000 { 306 #address-cells = <1>; 307 #size-cells = <0>; 308 compatible = "fsl,vf610-qspi"; 309 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>; 310 reg-names = "QuadSPI", "QuadSPI-memory"; 311 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; 312 clocks = <&clks VF610_CLK_QSPI0_EN>, 313 <&clks VF610_CLK_QSPI0>; 314 clock-names = "qspi_en", "qspi"; 315 status = "disabled"; 316 }; 317 318 iomuxc: iomuxc@40048000 { 319 compatible = "fsl,vf610-iomuxc"; 320 reg = <0x40048000 0x1000>; 321 }; 322 323 gpio0: gpio@40049000 { 324 compatible = "fsl,vf610-gpio"; 325 reg = <0x40049000 0x1000 0x400ff000 0x40>; 326 gpio-controller; 327 #gpio-cells = <2>; 328 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>; 329 interrupt-controller; 330 #interrupt-cells = <2>; 331 gpio-ranges = <&iomuxc 0 0 32>; 332 }; 333 334 gpio1: gpio@4004a000 { 335 compatible = "fsl,vf610-gpio"; 336 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 337 gpio-controller; 338 #gpio-cells = <2>; 339 interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; 340 interrupt-controller; 341 #interrupt-cells = <2>; 342 gpio-ranges = <&iomuxc 0 32 32>; 343 }; 344 345 gpio2: gpio@4004b000 { 346 compatible = "fsl,vf610-gpio"; 347 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 348 gpio-controller; 349 #gpio-cells = <2>; 350 interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; 351 interrupt-controller; 352 #interrupt-cells = <2>; 353 gpio-ranges = <&iomuxc 0 64 32>; 354 }; 355 356 gpio3: gpio@4004c000 { 357 compatible = "fsl,vf610-gpio"; 358 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 359 gpio-controller; 360 #gpio-cells = <2>; 361 interrupts = <110 IRQ_TYPE_LEVEL_HIGH>; 362 interrupt-controller; 363 #interrupt-cells = <2>; 364 gpio-ranges = <&iomuxc 0 96 32>; 365 }; 366 367 gpio4: gpio@4004d000 { 368 compatible = "fsl,vf610-gpio"; 369 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 370 gpio-controller; 371 #gpio-cells = <2>; 372 interrupts = <111 IRQ_TYPE_LEVEL_HIGH>; 373 interrupt-controller; 374 #interrupt-cells = <2>; 375 gpio-ranges = <&iomuxc 0 128 7>; 376 }; 377 378 anatop: anatop@40050000 { 379 compatible = "fsl,vf610-anatop", "syscon"; 380 reg = <0x40050000 0x400>; 381 }; 382 383 usbphy0: usbphy@40050800 { 384 compatible = "fsl,vf610-usbphy"; 385 reg = <0x40050800 0x400>; 386 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>; 387 clocks = <&clks VF610_CLK_USBPHY0>; 388 fsl,anatop = <&anatop>; 389 status = "disabled"; 390 }; 391 392 usbphy1: usbphy@40050c00 { 393 compatible = "fsl,vf610-usbphy"; 394 reg = <0x40050c00 0x400>; 395 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&clks VF610_CLK_USBPHY1>; 397 fsl,anatop = <&anatop>; 398 status = "disabled"; 399 }; 400 401 dcu0: dcu@40058000 { 402 compatible = "fsl,vf610-dcu"; 403 reg = <0x40058000 0x1200>; 404 interrupts = <30 IRQ_TYPE_LEVEL_HIGH>; 405 clocks = <&clks VF610_CLK_DCU0>, 406 <&clks VF610_CLK_DCU0_DIV>; 407 clock-names = "dcu", "pix"; 408 fsl,tcon = <&tcon0>; 409 status = "disabled"; 410 }; 411 412 i2c0: i2c@40066000 { 413 #address-cells = <1>; 414 #size-cells = <0>; 415 compatible = "fsl,vf610-i2c"; 416 reg = <0x40066000 0x1000>; 417 interrupts = <71 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&clks VF610_CLK_I2C0>; 419 clock-names = "ipg"; 420 dmas = <&edma0 0 50>, 421 <&edma0 0 51>; 422 dma-names = "rx","tx"; 423 status = "disabled"; 424 }; 425 426 i2c1: i2c@40067000 { 427 #address-cells = <1>; 428 #size-cells = <0>; 429 compatible = "fsl,vf610-i2c"; 430 reg = <0x40067000 0x1000>; 431 interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&clks VF610_CLK_I2C1>; 433 clock-names = "ipg"; 434 dmas = <&edma0 0 52>, 435 <&edma0 0 53>; 436 dma-names = "rx","tx"; 437 status = "disabled"; 438 }; 439 440 clks: ccm@4006b000 { 441 compatible = "fsl,vf610-ccm"; 442 reg = <0x4006b000 0x1000>; 443 clocks = <&sxosc>, <&fxosc>; 444 clock-names = "sxosc", "fxosc"; 445 #clock-cells = <1>; 446 }; 447 448 usbdev0: usb@40034000 { 449 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 450 reg = <0x40034000 0x800>; 451 interrupts = <75 IRQ_TYPE_LEVEL_HIGH>; 452 clocks = <&clks VF610_CLK_USBC0>; 453 fsl,usbphy = <&usbphy0>; 454 fsl,usbmisc = <&usbmisc0 0>; 455 dr_mode = "peripheral"; 456 status = "disabled"; 457 }; 458 459 usbmisc0: usb@40034800 { 460 #index-cells = <1>; 461 compatible = "fsl,vf610-usbmisc"; 462 reg = <0x40034800 0x200>; 463 clocks = <&clks VF610_CLK_USBC0>; 464 status = "disabled"; 465 }; 466 467 src: src@4006e000 { 468 compatible = "fsl,vf610-src", "syscon"; 469 reg = <0x4006e000 0x1000>; 470 interrupts = <96 IRQ_TYPE_LEVEL_HIGH>; 471 }; 472 }; 473 474 aips1: bus@40080000 { 475 compatible = "fsl,aips-bus", "simple-bus"; 476 #address-cells = <1>; 477 #size-cells = <1>; 478 reg = <0x40080000 0x0007f000>; 479 ranges; 480 481 edma1: dma-controller@40098000 { 482 #dma-cells = <2>; 483 compatible = "fsl,vf610-edma"; 484 reg = <0x40098000 0x2000>, 485 <0x400a1000 0x1000>, 486 <0x400a2000 0x1000>; 487 dma-channels = <32>; 488 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>, 489 <11 IRQ_TYPE_LEVEL_HIGH>; 490 interrupt-names = "edma-tx", "edma-err"; 491 clock-names = "dmamux0", "dmamux1"; 492 clocks = <&clks VF610_CLK_DMAMUX2>, 493 <&clks VF610_CLK_DMAMUX3>; 494 status = "disabled"; 495 }; 496 497 ocotp: ocotp@400a5000 { 498 compatible = "fsl,vf610-ocotp", "syscon"; 499 reg = <0x400a5000 0x1000>; 500 clocks = <&clks VF610_CLK_OCOTP>; 501 }; 502 503 snvs0: snvs@400a7000 { 504 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 505 reg = <0x400a7000 0x2000>; 506 507 snvsrtc: snvs-rtc-lp { 508 compatible = "fsl,sec-v4.0-mon-rtc-lp"; 509 regmap = <&snvs0>; 510 offset = <0x34>; 511 interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&clks VF610_CLK_SNVS>; 513 clock-names = "snvs-rtc"; 514 }; 515 }; 516 517 uart4: serial@400a9000 { 518 compatible = "fsl,vf610-lpuart"; 519 reg = <0x400a9000 0x1000>; 520 interrupts = <65 IRQ_TYPE_LEVEL_HIGH>; 521 clocks = <&clks VF610_CLK_UART4>; 522 clock-names = "ipg"; 523 status = "disabled"; 524 }; 525 526 uart5: serial@400aa000 { 527 compatible = "fsl,vf610-lpuart"; 528 reg = <0x400aa000 0x1000>; 529 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&clks VF610_CLK_UART5>; 531 clock-names = "ipg"; 532 status = "disabled"; 533 }; 534 535 dspi2: spi@400ac000 { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 compatible = "fsl,vf610-dspi"; 539 reg = <0x400ac000 0x1000>; 540 interrupts = <69 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&clks VF610_CLK_DSPI2>; 542 clock-names = "dspi"; 543 spi-num-chipselects = <2>; 544 dmas = <&edma1 0 10>, 545 <&edma1 0 11>; 546 dma-names = "rx", "tx"; 547 status = "disabled"; 548 }; 549 550 dspi3: spi@400ad000 { 551 #address-cells = <1>; 552 #size-cells = <0>; 553 compatible = "fsl,vf610-dspi"; 554 reg = <0x400ad000 0x1000>; 555 interrupts = <70 IRQ_TYPE_LEVEL_HIGH>; 556 clocks = <&clks VF610_CLK_DSPI3>; 557 clock-names = "dspi"; 558 spi-num-chipselects = <2>; 559 dmas = <&edma1 0 12>, 560 <&edma1 0 13>; 561 dma-names = "rx", "tx"; 562 status = "disabled"; 563 }; 564 565 adc1: adc@400bb000 { 566 compatible = "fsl,vf610-adc"; 567 reg = <0x400bb000 0x1000>; 568 interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; 569 clocks = <&clks VF610_CLK_ADC1>; 570 clock-names = "adc"; 571 #io-channel-cells = <1>; 572 status = "disabled"; 573 fsl,adck-max-frequency = <30000000>, <40000000>, 574 <20000000>; 575 }; 576 577 esdhc0: esdhc@400b1000 { 578 compatible = "fsl,imx53-esdhc"; 579 reg = <0x400b1000 0x1000>; 580 interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&clks VF610_CLK_IPG_BUS>, 582 <&clks VF610_CLK_PLATFORM_BUS>, 583 <&clks VF610_CLK_ESDHC0>; 584 clock-names = "ipg", "ahb", "per"; 585 status = "disabled"; 586 }; 587 588 esdhc1: esdhc@400b2000 { 589 compatible = "fsl,imx53-esdhc"; 590 reg = <0x400b2000 0x1000>; 591 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>; 592 clocks = <&clks VF610_CLK_IPG_BUS>, 593 <&clks VF610_CLK_PLATFORM_BUS>, 594 <&clks VF610_CLK_ESDHC1>; 595 clock-names = "ipg", "ahb", "per"; 596 status = "disabled"; 597 }; 598 599 usbh1: usb@400b4000 { 600 compatible = "fsl,vf610-usb", "fsl,imx27-usb"; 601 reg = <0x400b4000 0x800>; 602 interrupts = <76 IRQ_TYPE_LEVEL_HIGH>; 603 clocks = <&clks VF610_CLK_USBC1>; 604 fsl,usbphy = <&usbphy1>; 605 fsl,usbmisc = <&usbmisc1 0>; 606 dr_mode = "host"; 607 status = "disabled"; 608 }; 609 610 usbmisc1: usb@400b4800 { 611 #index-cells = <1>; 612 compatible = "fsl,vf610-usbmisc"; 613 reg = <0x400b4800 0x200>; 614 clocks = <&clks VF610_CLK_USBC1>; 615 status = "disabled"; 616 }; 617 618 ftm: ftm@400b8000 { 619 compatible = "fsl,ftm-timer"; 620 reg = <0x400b8000 0x1000 0x400b9000 0x1000>; 621 interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; 622 clock-names = "ftm-evt", "ftm-src", 623 "ftm-evt-counter-en", "ftm-src-counter-en"; 624 clocks = <&clks VF610_CLK_FTM2>, 625 <&clks VF610_CLK_FTM3>, 626 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, 627 <&clks VF610_CLK_FTM3_EXT_FIX_EN>; 628 status = "disabled"; 629 }; 630 631 qspi1: spi@400c4000 { 632 #address-cells = <1>; 633 #size-cells = <0>; 634 compatible = "fsl,vf610-qspi"; 635 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>; 636 reg-names = "QuadSPI", "QuadSPI-memory"; 637 interrupts = <25 IRQ_TYPE_LEVEL_HIGH>; 638 clocks = <&clks VF610_CLK_QSPI1_EN>, 639 <&clks VF610_CLK_QSPI1>; 640 clock-names = "qspi_en", "qspi"; 641 status = "disabled"; 642 }; 643 644 dac0: dac@400cc000 { 645 compatible = "fsl,vf610-dac"; 646 reg = <0x400cc000 1000>; 647 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>; 648 clock-names = "dac"; 649 clocks = <&clks VF610_CLK_DAC0>; 650 status = "disabled"; 651 }; 652 653 dac1: dac@400cd000 { 654 compatible = "fsl,vf610-dac"; 655 reg = <0x400cd000 1000>; 656 interrupts = <56 IRQ_TYPE_LEVEL_HIGH>; 657 clock-names = "dac"; 658 clocks = <&clks VF610_CLK_DAC1>; 659 status = "disabled"; 660 }; 661 662 fec0: ethernet@400d0000 { 663 compatible = "fsl,mvf600-fec"; 664 reg = <0x400d0000 0x1000>; 665 interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&clks VF610_CLK_ENET0>, 667 <&clks VF610_CLK_ENET0>, 668 <&clks VF610_CLK_ENET>; 669 clock-names = "ipg", "ahb", "ptp"; 670 status = "disabled"; 671 }; 672 673 fec1: ethernet@400d1000 { 674 compatible = "fsl,mvf600-fec"; 675 reg = <0x400d1000 0x1000>; 676 interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; 677 clocks = <&clks VF610_CLK_ENET1>, 678 <&clks VF610_CLK_ENET1>, 679 <&clks VF610_CLK_ENET>; 680 clock-names = "ipg", "ahb", "ptp"; 681 status = "disabled"; 682 }; 683 684 can1: can@400d4000 { 685 compatible = "fsl,vf610-flexcan"; 686 reg = <0x400d4000 0x4000>; 687 interrupts = <59 IRQ_TYPE_LEVEL_HIGH>; 688 clocks = <&clks VF610_CLK_FLEXCAN1>, 689 <&clks VF610_CLK_FLEXCAN1>; 690 clock-names = "ipg", "per"; 691 status = "disabled"; 692 }; 693 694 nfc: nand@400e0000 { 695 #address-cells = <1>; 696 #size-cells = <0>; 697 compatible = "fsl,vf610-nfc"; 698 reg = <0x400e0000 0x4000>; 699 interrupts = <83 IRQ_TYPE_LEVEL_HIGH>; 700 clocks = <&clks VF610_CLK_NFC>; 701 clock-names = "nfc"; 702 status = "disabled"; 703 }; 704 705 i2c2: i2c@400e6000 { 706 #address-cells = <1>; 707 #size-cells = <0>; 708 compatible = "fsl,vf610-i2c"; 709 reg = <0x400e6000 0x1000>; 710 interrupts = <73 IRQ_TYPE_LEVEL_HIGH>; 711 clocks = <&clks VF610_CLK_I2C2>; 712 clock-names = "ipg"; 713 dmas = <&edma0 1 36>, 714 <&edma0 1 37>; 715 dma-names = "rx","tx"; 716 status = "disabled"; 717 }; 718 719 i2c3: i2c@400e7000 { 720 #address-cells = <1>; 721 #size-cells = <0>; 722 compatible = "fsl,vf610-i2c"; 723 reg = <0x400e7000 0x1000>; 724 interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&clks VF610_CLK_I2C3>; 726 clock-names = "ipg"; 727 dmas = <&edma0 1 38>, 728 <&edma0 1 39>; 729 dma-names = "rx","tx"; 730 status = "disabled"; 731 }; 732 733 crypto: crypto@400f0000 { 734 compatible = "fsl,sec-v4.0"; 735 #address-cells = <1>; 736 #size-cells = <1>; 737 reg = <0x400f0000 0x9000>; 738 ranges = <0 0x400f0000 0x9000>; 739 clocks = <&clks VF610_CLK_CAAM>; 740 clock-names = "ipg"; 741 742 sec_jr0: jr0@1000 { 743 compatible = "fsl,sec-v4.0-job-ring"; 744 reg = <0x1000 0x1000>; 745 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 746 }; 747 748 sec_jr1: jr1@2000 { 749 compatible = "fsl,sec-v4.0-job-ring"; 750 reg = <0x2000 0x1000>; 751 interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; 752 }; 753 }; 754 }; 755 }; 756};